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DAGCombine: Make sure we only eliminate trunc/extend when the scales of truncation and extension match.
This fixes PR33368. Reviewer: rksimon Differential Revision: https://reviews.llvm.org/D34069 llvm-svn: 306345
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@ -15013,6 +15013,11 @@ static SDValue combineTruncationShuffle(ShuffleVectorSDNode *SVN,
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unsigned NumElts = VT.getVectorNumElements();
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unsigned EltSizeInBits = VT.getScalarSizeInBits();
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unsigned ExtSrcSizeInBits = N00.getScalarValueSizeInBits();
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unsigned ExtDstSizeInBits = N0.getScalarValueSizeInBits();
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if (ExtDstSizeInBits % ExtSrcSizeInBits != 0)
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return SDValue();
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unsigned ExtScale = ExtDstSizeInBits / ExtSrcSizeInBits;
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// (v4i32 truncate_vector_inreg(v2i64)) == shuffle<0,2-1,-1>
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// (v8i16 truncate_vector_inreg(v4i32)) == shuffle<0,2,4,6,-1,-1,-1,-1>
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@ -15034,11 +15039,10 @@ static SDValue combineTruncationShuffle(ShuffleVectorSDNode *SVN,
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if (EltSizeInBits != ExtSrcSizeInBits)
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return SDValue();
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// Attempt to match a 'truncate_vector_inreg' shuffle, we just search for
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// power-of-2 truncations as they are the most likely.
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for (unsigned Scale = 2; Scale < NumElts; Scale *= 2)
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if (isTruncate(Scale))
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return DAG.getBitcast(VT, N00);
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// We can remove *extend_vector_inreg only if the truncation happens at
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// the same scale as the extension.
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if (isTruncate(ExtScale))
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return DAG.getBitcast(VT, N00);
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return SDValue();
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}
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35
test/CodeGen/X86/vector-truncate-combine.ll
Normal file
35
test/CodeGen/X86/vector-truncate-combine.ll
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@ -0,0 +1,35 @@
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; RUN: llc -mtriple=x86_64-- -O2 -start-after=stack-protector -stop-before=loops %s -o - | FileCheck %s
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; This test verifies the fix for PR33368.
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;
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; The expected outcome of the operation is to store bytes 0 and 2 of the incoming
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; parameter into c2 (a 2 x i8 vector). DAGCombine converts shuffles into a
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; sequence of extend and subsequent truncate operations. The bug was that an extension
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; by 4 followed by a truncation by 8 was completely eliminated.
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; The test checks for the correct sequence of operations that results from the
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; preservation of the extend/truncate operations mentioned above (2 extend and
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; 3 truncate instructions).
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;
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; NOTE: This operation could be collapsed in to a single truncate. Once that is done
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; this test will have to be adjusted.
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; CHECK: PUNPCKLBWrr
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; CHECK: PUNPCKLWDrr
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; CHECK: PACKUSWBrr
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; CHECK: PACKUSWBrr
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; CHECK: PACKUSWBrr
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define void @test(double %vec.coerce) local_unnamed_addr {
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entry:
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%c2 = alloca <2 x i8>, align 2
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%0 = bitcast double %vec.coerce to <8 x i8>
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%1 = shufflevector <8 x i8> %0, <8 x i8> undef, <4 x i32> <i32 2, i32 undef, i32 undef, i32 0>
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%2 = shufflevector <4 x i8> %1, <4 x i8> undef, <2 x i32> <i32 3, i32 0>
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store volatile <2 x i8> %2, <2 x i8>* %c2, align 2
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br label %if.end
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if.end:
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%3 = bitcast <2 x i8> %2 to i16
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ret void
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}
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