mirror of
https://github.com/RPCS3/llvm-mirror.git
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Switch PPC over to a call-selection model where the lowering code creates
the copyto/fromregs instead of making the PPCISD::CALL selection code create them. This vastly simplifies the selection code, and moves the ABI handling parts into one place. llvm-svn: 28346
This commit is contained in:
parent
7c87670503
commit
03c70b7f27
@ -874,129 +874,55 @@ static bool isCallCompatibleAddress(ConstantSDNode *C) {
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SDOperand PPCDAGToDAGISel::SelectCALL(SDOperand Op) {
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SDNode *N = Op.Val;
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SDOperand Chain;
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SDOperand Chain, Flag;
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Select(Chain, N->getOperand(0));
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if (N->getNumOperands() == 3) // input flag
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Select(Flag, N->getOperand(2));
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unsigned CallOpcode;
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std::vector<SDOperand> CallOperands;
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std::vector<SDOperand> CallArgs;
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if (GlobalAddressSDNode *GASD =
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dyn_cast<GlobalAddressSDNode>(N->getOperand(1))) {
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CallOpcode = PPC::BL;
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CallOperands.push_back(N->getOperand(1));
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CallArgs.push_back(N->getOperand(1));
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} else if (ExternalSymbolSDNode *ESSDN =
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dyn_cast<ExternalSymbolSDNode>(N->getOperand(1))) {
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CallOpcode = PPC::BL;
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CallOperands.push_back(N->getOperand(1));
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CallArgs.push_back(N->getOperand(1));
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} else if (isa<ConstantSDNode>(N->getOperand(1)) &&
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isCallCompatibleAddress(cast<ConstantSDNode>(N->getOperand(1)))) {
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ConstantSDNode *C = cast<ConstantSDNode>(N->getOperand(1));
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CallOpcode = PPC::BLA;
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CallOperands.push_back(getI32Imm((int)C->getValue() >> 2));
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CallArgs.push_back(getI32Imm((int)C->getValue() >> 2));
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} else {
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// Copy the callee address into the CTR register.
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SDOperand Callee;
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Select(Callee, N->getOperand(1));
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Chain = SDOperand(CurDAG->getTargetNode(PPC::MTCTR, MVT::Other, Callee,
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Chain), 0);
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if (Flag.Val)
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Chain = SDOperand(CurDAG->getTargetNode(PPC::MTCTR, MVT::Other, MVT::Flag,
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Callee, Chain, Flag), 0);
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else
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Chain = SDOperand(CurDAG->getTargetNode(PPC::MTCTR, MVT::Other, MVT::Flag,
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Callee, Chain), 0);
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Flag = Chain.getValue(1);
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// Copy the callee address into R12 on darwin.
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SDOperand R12 = CurDAG->getRegister(PPC::R12, MVT::i32);
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Chain = CurDAG->getNode(ISD::CopyToReg, MVT::Other, Chain, R12, Callee);
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Chain = CurDAG->getCopyToReg(Chain, PPC::R12, Callee, Flag);
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Flag = Chain.getValue(1);
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CallOperands.push_back(R12);
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CallOpcode = PPC::BCTRL;
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}
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unsigned GPR_idx = 0, FPR_idx = 0, VR_idx = 0;
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static const unsigned GPR[] = {
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PPC::R3, PPC::R4, PPC::R5, PPC::R6,
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PPC::R7, PPC::R8, PPC::R9, PPC::R10,
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};
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static const unsigned FPR[] = {
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PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7,
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PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13
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};
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static const unsigned VR[] = {
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PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8,
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PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
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};
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SDOperand InFlag; // Null incoming flag value.
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for (unsigned i = 2, e = N->getNumOperands(); i != e; ++i) {
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unsigned DestReg = 0;
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MVT::ValueType RegTy = N->getOperand(i).getValueType();
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if (RegTy == MVT::i32) {
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assert(GPR_idx < 8 && "Too many int args");
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DestReg = GPR[GPR_idx++];
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} else if (MVT::isFloatingPoint(N->getOperand(i).getValueType())) {
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assert(FPR_idx < 13 && "Too many fp args");
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DestReg = FPR[FPR_idx++];
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} else {
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assert(MVT::isVector(N->getOperand(i).getValueType()) && "unknown arg!");
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assert(VR_idx < 12 && "Too many vector args");
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DestReg = VR[VR_idx++];
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}
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if (N->getOperand(i).getOpcode() != ISD::UNDEF) {
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SDOperand Val;
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Select(Val, N->getOperand(i));
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Chain = CurDAG->getCopyToReg(Chain, DestReg, Val, InFlag);
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InFlag = Chain.getValue(1);
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CallOperands.push_back(CurDAG->getRegister(DestReg, RegTy));
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}
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}
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// Finally, once everything is in registers to pass to the call, emit the
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// call itself.
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if (InFlag.Val)
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CallOperands.push_back(InFlag); // Strong dep on register copies.
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else
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CallOperands.push_back(Chain); // Weak dep on whatever occurs before
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// Emit the call itself.
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CallArgs.push_back(Chain);
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if (Flag.Val)
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CallArgs.push_back(Flag);
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Chain = SDOperand(CurDAG->getTargetNode(CallOpcode, MVT::Other, MVT::Flag,
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CallOperands), 0);
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std::vector<SDOperand> CallResults;
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// If the call has results, copy the values out of the ret val registers.
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switch (N->getValueType(0)) {
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default: assert(0 && "Unexpected ret value!");
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case MVT::Other: break;
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case MVT::i32:
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if (N->getValueType(1) == MVT::i32) {
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Chain = CurDAG->getCopyFromReg(Chain, PPC::R4, MVT::i32,
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Chain.getValue(1)).getValue(1);
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CallResults.push_back(Chain.getValue(0));
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Chain = CurDAG->getCopyFromReg(Chain, PPC::R3, MVT::i32,
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Chain.getValue(2)).getValue(1);
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CallResults.push_back(Chain.getValue(0));
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} else {
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Chain = CurDAG->getCopyFromReg(Chain, PPC::R3, MVT::i32,
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Chain.getValue(1)).getValue(1);
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CallResults.push_back(Chain.getValue(0));
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}
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break;
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case MVT::f32:
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case MVT::f64:
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Chain = CurDAG->getCopyFromReg(Chain, PPC::F1, N->getValueType(0),
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Chain.getValue(1)).getValue(1);
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CallResults.push_back(Chain.getValue(0));
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break;
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case MVT::v4f32:
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case MVT::v4i32:
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case MVT::v8i16:
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case MVT::v16i8:
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Chain = CurDAG->getCopyFromReg(Chain, PPC::V2, N->getValueType(0),
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Chain.getValue(1)).getValue(1);
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CallResults.push_back(Chain.getValue(0));
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break;
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}
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CallResults.push_back(Chain);
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for (unsigned i = 0, e = CallResults.size(); i != e; ++i)
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CodeGenMap[Op.getValue(i)] = CallResults[i];
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return CallResults[Op.ResNo];
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CallArgs), 0);
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CodeGenMap[Op.getValue(0)] = Chain;
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CodeGenMap[Op.getValue(1)] = Chain.getValue(1);
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return Chain.getValue(Op.ResNo);
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}
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// Select - Convert the specified operand from a target-independent to a
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@ -925,11 +925,25 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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// must be stored to our stack, and loaded into integer regs as well, if
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// any integer regs are available for argument passing.
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unsigned ArgOffset = 24;
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unsigned GPR_remaining = 8;
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unsigned FPR_remaining = 13;
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unsigned VR_remaining = 12;
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unsigned GPR_idx = 0, FPR_idx = 0, VR_idx = 0;
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static const unsigned GPR[] = {
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PPC::R3, PPC::R4, PPC::R5, PPC::R6,
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PPC::R7, PPC::R8, PPC::R9, PPC::R10,
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};
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static const unsigned FPR[] = {
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PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7,
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PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13
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};
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static const unsigned VR[] = {
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PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8,
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PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
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};
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const unsigned NumGPRs = sizeof(GPR)/sizeof(GPR[0]);
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const unsigned NumFPRs = sizeof(FPR)/sizeof(FPR[0]);
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const unsigned NumVRs = sizeof( VR)/sizeof( VR[0]);
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std::vector<SDOperand> MemOps;
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std::vector<std::pair<unsigned, SDOperand> > RegsToPass;
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std::vector<SDOperand> MemOpChains;
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for (unsigned i = 5, e = Op.getNumOperands(); i != e; ++i) {
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SDOperand Arg = Op.getOperand(i);
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@ -940,57 +954,51 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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switch (Arg.getValueType()) {
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default: assert(0 && "Unexpected ValueType for argument!");
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case MVT::i32:
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if (GPR_remaining > 0) {
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args_to_use.push_back(Arg);
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--GPR_remaining;
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if (GPR_idx != NumGPRs) {
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RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Arg));
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} else {
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MemOps.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
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MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
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Arg, PtrOff, DAG.getSrcValue(NULL)));
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}
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ArgOffset += 4;
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break;
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case MVT::f32:
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case MVT::f64:
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if (FPR_remaining > 0) {
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args_to_use.push_back(Arg);
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--FPR_remaining;
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if (FPR_idx != NumFPRs) {
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RegsToPass.push_back(std::make_pair(FPR[FPR_idx++], Arg));
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if (isVarArg) {
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SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Chain,
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Arg, PtrOff,
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DAG.getSrcValue(NULL));
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MemOps.push_back(Store);
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MemOpChains.push_back(Store);
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// Float varargs are always shadowed in available integer registers
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if (GPR_remaining > 0) {
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if (GPR_idx != NumGPRs) {
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SDOperand Load = DAG.getLoad(MVT::i32, Store, PtrOff,
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DAG.getSrcValue(NULL));
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MemOps.push_back(Load.getValue(1));
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args_to_use.push_back(Load);
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--GPR_remaining;
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MemOpChains.push_back(Load.getValue(1));
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RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
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}
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if (GPR_remaining > 0 && Arg.getValueType() == MVT::f64) {
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if (GPR_idx != NumGPRs && Arg.getValueType() == MVT::f64) {
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SDOperand ConstFour = DAG.getConstant(4, PtrOff.getValueType());
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PtrOff = DAG.getNode(ISD::ADD, MVT::i32, PtrOff, ConstFour);
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SDOperand Load = DAG.getLoad(MVT::i32, Store, PtrOff,
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DAG.getSrcValue(NULL));
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MemOps.push_back(Load.getValue(1));
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args_to_use.push_back(Load);
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--GPR_remaining;
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MemOpChains.push_back(Load.getValue(1));
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RegsToPass.push_back(std::make_pair(GPR[GPR_idx++], Load));
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}
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} else {
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// If we have any FPRs remaining, we may also have GPRs remaining.
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// Args passed in FPRs consume either 1 (f32) or 2 (f64) available
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// GPRs.
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if (GPR_remaining > 0) {
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args_to_use.push_back(DAG.getNode(ISD::UNDEF, MVT::i32));
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--GPR_remaining;
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}
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if (GPR_remaining > 0 && Arg.getValueType() == MVT::f64) {
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args_to_use.push_back(DAG.getNode(ISD::UNDEF, MVT::i32));
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--GPR_remaining;
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}
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if (GPR_idx != NumGPRs)
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++GPR_idx;
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if (GPR_idx != NumGPRs && Arg.getValueType() == MVT::f64)
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++GPR_idx;
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}
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} else {
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MemOps.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
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MemOpChains.push_back(DAG.getNode(ISD::STORE, MVT::Other, Chain,
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Arg, PtrOff, DAG.getSrcValue(NULL)));
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}
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ArgOffset += (Arg.getValueType() == MVT::f32) ? 4 : 8;
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@ -1000,43 +1008,86 @@ static SDOperand LowerCALL(SDOperand Op, SelectionDAG &DAG) {
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case MVT::v8i16:
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case MVT::v16i8:
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assert(!isVarArg && "Don't support passing vectors to varargs yet!");
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assert(VR_remaining &&
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assert(VR_idx != NumVRs &&
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"Don't support passing more than 12 vector args yet!");
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args_to_use.push_back(Arg);
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--VR_remaining;
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RegsToPass.push_back(std::make_pair(VR[VR_idx++], Arg));
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break;
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}
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}
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if (!MemOps.empty())
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Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, MemOps);
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if (!MemOpChains.empty())
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Chain = DAG.getNode(ISD::TokenFactor, MVT::Other, MemOpChains);
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std::vector<MVT::ValueType> RetVals(Op.Val->value_begin(),
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Op.Val->value_end());
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// Build a sequence of copy-to-reg nodes chained together with token chain
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// and flag operands which copy the outgoing args into the appropriate regs.
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SDOperand InFlag;
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for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) {
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Chain = DAG.getCopyToReg(Chain, RegsToPass[i].first, RegsToPass[i].second,
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InFlag);
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InFlag = Chain.getValue(1);
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}
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// If the callee is a GlobalAddress node (quite common, every direct call is)
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// turn it into a TargetGlobalAddress node so that legalize doesn't hack it.
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if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee))
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Callee = DAG.getTargetGlobalAddress(G->getGlobal(), MVT::i32);
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Callee = DAG.getTargetGlobalAddress(G->getGlobal(), Callee.getValueType());
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// Create the PPCISD::CALL node itself.
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std::vector<MVT::ValueType> NodeTys;
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NodeTys.push_back(MVT::Other); // Returns a chain
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NodeTys.push_back(MVT::Flag); // Returns a flag for retval copy to use.
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std::vector<SDOperand> Ops;
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Ops.push_back(Chain);
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Ops.push_back(Callee);
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Ops.insert(Ops.end(), args_to_use.begin(), args_to_use.end());
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SDOperand TheCall = DAG.getNode(PPCISD::CALL, RetVals, Ops);
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if (InFlag.Val)
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Ops.push_back(InFlag);
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Chain = DAG.getNode(PPCISD::CALL, NodeTys, Ops);
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InFlag = Chain.getValue(1);
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std::vector<SDOperand> ResultVals;
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NodeTys.clear();
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// If the call has results, copy the values out of the ret val registers.
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switch (Op.Val->getValueType(0)) {
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default: assert(0 && "Unexpected ret value!");
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case MVT::Other: break;
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case MVT::i32:
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if (Op.Val->getValueType(1) == MVT::i32) {
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Chain = DAG.getCopyFromReg(Chain, PPC::R4, MVT::i32, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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Chain = DAG.getCopyFromReg(Chain, PPC::R3, MVT::i32,
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Chain.getValue(2)).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(MVT::i32);
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} else {
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Chain = DAG.getCopyFromReg(Chain, PPC::R3, MVT::i32, InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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}
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NodeTys.push_back(MVT::i32);
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break;
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case MVT::f32:
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case MVT::f64:
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Chain = DAG.getCopyFromReg(Chain, PPC::F1, Op.Val->getValueType(0),
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InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(Op.Val->getValueType(0));
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break;
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case MVT::v4f32:
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case MVT::v4i32:
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case MVT::v8i16:
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case MVT::v16i8:
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Chain = DAG.getCopyFromReg(Chain, PPC::V2, Op.Val->getValueType(0),
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InFlag).getValue(1);
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ResultVals.push_back(Chain.getValue(0));
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NodeTys.push_back(Op.Val->getValueType(0));
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break;
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}
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Chain = TheCall.getValue(TheCall.Val->getNumValues()-1);
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Chain = DAG.getNode(ISD::CALLSEQ_END, MVT::Other, Chain,
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DAG.getConstant(NumBytes, MVT::i32));
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NodeTys.push_back(MVT::Other);
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std::vector<MVT::ValueType> RetVT(Op.Val->value_begin(),
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Op.Val->value_end());
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Ops.clear();
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for (unsigned i = 0, e = TheCall.Val->getNumValues()-1; i != e; ++i)
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Ops.push_back(SDOperand(TheCall.Val, i));
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Ops.push_back(Chain);
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SDOperand Res = DAG.getNode(ISD::MERGE_VALUES, RetVT, Ops);
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ResultVals.push_back(Chain);
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SDOperand Res = DAG.getNode(ISD::MERGE_VALUES, NodeTys, ResultVals);
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return Res.getValue(Op.ResNo);
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}
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@ -72,6 +72,10 @@ def PPCstd_32 : SDNode<"PPCISD::STD_32" , SDTStore, [SDNPHasChain]>;
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def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_PPCCallSeq,[SDNPHasChain]>;
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def callseq_end : SDNode<"ISD::CALLSEQ_END", SDT_PPCCallSeq,[SDNPHasChain]>;
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def SDT_PPCCall : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;
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||||
def call : SDNode<"PPCISD::CALL", SDT_PPCCall,
|
||||
[SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>;
|
||||
|
||||
def retflag : SDNode<"PPCISD::RET_FLAG", SDT_PPCRetFlag,
|
||||
[SDNPHasChain, SDNPOptInFlag]>;
|
||||
|
||||
@ -303,11 +307,11 @@ let isCall = 1, noResults = 1, PPC970_Unit = 7,
|
||||
LR,CTR,
|
||||
CR0,CR1,CR5,CR6,CR7] in {
|
||||
// Convenient aliases for call instructions
|
||||
def BL : IForm<18, 0, 1, (ops calltarget:$func, variable_ops),
|
||||
def BL : IForm<18, 0, 1, (ops calltarget:$func),
|
||||
"bl $func", BrB, []>;
|
||||
def BLA : IForm<18, 1, 1, (ops aaddr:$func, variable_ops),
|
||||
def BLA : IForm<18, 1, 1, (ops aaddr:$func),
|
||||
"bla $func", BrB, []>;
|
||||
def BCTRL : XLForm_2_ext<19, 528, 20, 0, 1, (ops variable_ops), "bctrl", BrB,
|
||||
def BCTRL : XLForm_2_ext<19, 528, 20, 0, 1, (ops), "bctrl", BrB,
|
||||
[]>;
|
||||
}
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user