diff --git a/include/llvm/CodeGen/ValueTypes.h b/include/llvm/CodeGen/ValueTypes.h
index 1a08f4d6086..2846eb02db2 100644
--- a/include/llvm/CodeGen/ValueTypes.h
+++ b/include/llvm/CodeGen/ValueTypes.h
@@ -444,8 +444,11 @@ namespace llvm {
     /// getIntegerVTBitMask - Return an integer with 1's every place there are
     /// bits in the specified integer value type. FIXME: Should return an apint.
     uint64_t getIntegerVTBitMask() const {
-      assert(isInteger() && !isVector() && "Only applies to int scalars!");
-      return ~uint64_t(0UL) >> (64-getSizeInBits());
+      assert(isInteger() && "Only applies to integers!");
+      MVT EltVT = isVector() ? getVectorElementType() : *this;
+      assert(EltVT.getSizeInBits() <= 64 &&
+             "getIntegerVTBitMask doesn't use APInt!");
+      return ~uint64_t(0UL) >> (64-EltVT.getSizeInBits());
     }
 
     /// getIntegerVTSignBit - Return an integer with a 1 in the position of the
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index d1759c1ab0e..d4df880d0be 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2434,11 +2434,12 @@ SDValue DAGCombiner::visitSHL(SDNode *N) {
     if (ConstantSDNode *N101C = dyn_cast<ConstantSDNode>(N101)) {
       MVT TruncVT = N1.getValueType();
       SDValue N100 = N1.getOperand(0).getOperand(0);
+      uint64_t TruncC = TruncVT.getIntegerVTBitMask() &
+                        N101C->getZExtValue();
       return DAG.getNode(ISD::SHL, VT, N0,
                          DAG.getNode(ISD::AND, TruncVT,
                                      DAG.getNode(ISD::TRUNCATE, TruncVT, N100),
-                                     DAG.getConstant(N101C->getZExtValue(),
-                                                     TruncVT)));
+                                     DAG.getConstant(TruncC, TruncVT)));
     }
   }
 
@@ -2561,11 +2562,12 @@ SDValue DAGCombiner::visitSRA(SDNode *N) {
     if (ConstantSDNode *N101C = dyn_cast<ConstantSDNode>(N101)) {
       MVT TruncVT = N1.getValueType();
       SDValue N100 = N1.getOperand(0).getOperand(0);
+      uint64_t TruncC = TruncVT.getIntegerVTBitMask() &
+                        N101C->getZExtValue();
       return DAG.getNode(ISD::SRA, VT, N0,
                          DAG.getNode(ISD::AND, TruncVT,
                                      DAG.getNode(ISD::TRUNCATE, TruncVT, N100),
-                                     DAG.getConstant(N101C->getZExtValue(),
-                                                     TruncVT)));
+                                     DAG.getConstant(TruncC, TruncVT)));
     }
   }
 
@@ -2678,11 +2680,12 @@ SDValue DAGCombiner::visitSRL(SDNode *N) {
     if (ConstantSDNode *N101C = dyn_cast<ConstantSDNode>(N101)) {
       MVT TruncVT = N1.getValueType();
       SDValue N100 = N1.getOperand(0).getOperand(0);
+      uint64_t TruncC = TruncVT.getIntegerVTBitMask() &
+                        N101C->getZExtValue();
       return DAG.getNode(ISD::SRL, VT, N0,
                          DAG.getNode(ISD::AND, TruncVT,
                                      DAG.getNode(ISD::TRUNCATE, TruncVT, N100),
-                                     DAG.getConstant(N101C->getZExtValue(),
-                                                     TruncVT)));
+                                     DAG.getConstant(TruncC, TruncVT)));
     }
   }
   
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 723c512c92e..58ac8c285c9 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -6293,7 +6293,7 @@ SDValue SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDValue Op) {
     unsigned len = VT.getSizeInBits();
     for (unsigned i = 0; (1U << i) <= (len / 2); ++i) {
       //x = (x & mask[i][len/8]) + (x >> (1 << i) & mask[i][len/8])
-      SDValue Tmp2 = DAG.getConstant(mask[i], VT);
+      SDValue Tmp2 = DAG.getConstant(VT.getIntegerVTBitMask() & mask[i], VT);
       SDValue Tmp3 = DAG.getConstant(1ULL << i, ShVT);
       Op = DAG.getNode(ISD::ADD, VT, DAG.getNode(ISD::AND, VT, Op, Tmp2),
                        DAG.getNode(ISD::AND, VT,
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 7fd50aca401..63fc97c20a8 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -848,6 +848,9 @@ SDValue SelectionDAG::getNOT(SDValue Val, MVT VT) {
 
 SDValue SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
   MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
+  assert((EltVT.getSizeInBits() >= 64 ||
+         (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
+         "getConstant with a uint64_t value that doesn't fit in the type!");
   return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
 }