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[CVP] Remove a masking operation if range information implies it's a noop
This is really a known bits style transformation, but known bits isn't context sensitive. The particular case which comes up happens to involve a range which allows range based reasoning to eliminate the mask pattern, so handle that case specifically in CVP. InstCombine likes to generate the mask-by-low-bits pattern when widening an arithmetic expression which includes a zext in the middle. Differential Revision: https://reviews.llvm.org/D68811 llvm-svn: 374506
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@ -63,6 +63,7 @@ STATISTIC(NumUDivs, "Number of udivs whose width was decreased");
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STATISTIC(NumAShrs, "Number of ashr converted to lshr");
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STATISTIC(NumSRems, "Number of srem converted to urem");
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STATISTIC(NumSExt, "Number of sext converted to zext");
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STATISTIC(NumAnd, "Number of ands removed");
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STATISTIC(NumOverflows, "Number of overflow checks removed");
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STATISTIC(NumSaturating,
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"Number of saturating arithmetics converted to normal arithmetics");
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@ -700,6 +701,29 @@ static bool processBinOp(BinaryOperator *BinOp, LazyValueInfo *LVI) {
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return Changed;
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}
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static bool processAnd(BinaryOperator *BinOp, LazyValueInfo *LVI) {
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if (BinOp->getType()->isVectorTy())
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return false;
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// Pattern match (and lhs, C) where C includes a superset of bits which might
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// be set in lhs. This is a common truncation idiom created by instcombine.
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BasicBlock *BB = BinOp->getParent();
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Value *LHS = BinOp->getOperand(0);
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ConstantInt *RHS = dyn_cast<ConstantInt>(BinOp->getOperand(1));
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if (!RHS || !RHS->getValue().isMask())
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return false;
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ConstantRange LRange = LVI->getConstantRange(LHS, BB, BinOp);
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if (!LRange.getUnsignedMax().ule(RHS->getValue()))
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return false;
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BinOp->replaceAllUsesWith(LHS);
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BinOp->eraseFromParent();
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NumAnd++;
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return true;
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}
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static Constant *getConstantAt(Value *V, Instruction *At, LazyValueInfo *LVI) {
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if (Constant *C = LVI->getConstant(V, At->getParent(), At))
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return C;
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@ -774,6 +798,9 @@ static bool runImpl(Function &F, LazyValueInfo *LVI, DominatorTree *DT,
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case Instruction::Sub:
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BBChanged |= processBinOp(cast<BinaryOperator>(II), LVI);
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break;
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case Instruction::And:
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BBChanged |= processAnd(cast<BinaryOperator>(II), LVI);
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break;
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}
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}
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127
test/Transforms/CorrelatedValuePropagation/and.ll
Normal file
127
test/Transforms/CorrelatedValuePropagation/and.ll
Normal file
@ -0,0 +1,127 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -correlated-propagation -S | FileCheck %s
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define i32 @test(i32 %a) {
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; CHECK-LABEL: @test(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 128
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; CHECK-NEXT: br i1 [[CMP]], label [[CONTINUE:%.*]], label [[EXIT:%.*]]
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; CHECK: continue:
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; CHECK-NEXT: ret i32 [[A]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 -1
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;
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entry:
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%cmp = icmp ult i32 %a, 128
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br i1 %cmp, label %continue, label %exit
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continue:
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%and = and i32 %a, 255
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ret i32 %and
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exit:
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ret i32 -1
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}
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define i32 @test2(i32 %a) {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 256
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; CHECK-NEXT: br i1 [[CMP]], label [[CONTINUE:%.*]], label [[EXIT:%.*]]
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; CHECK: continue:
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; CHECK-NEXT: ret i32 [[A]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 -1
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;
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entry:
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%cmp = icmp ult i32 %a, 256
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br i1 %cmp, label %continue, label %exit
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continue:
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%and = and i32 %a, 255
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ret i32 %and
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exit:
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ret i32 -1
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}
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define i32 @test3(i32 %a) {
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; CHECK-LABEL: @test3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 256
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; CHECK-NEXT: br i1 [[CMP]], label [[CONTINUE:%.*]], label [[EXIT:%.*]]
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; CHECK: continue:
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; CHECK-NEXT: ret i32 [[A]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 -1
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;
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entry:
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%cmp = icmp ult i32 %a, 256
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br i1 %cmp, label %continue, label %exit
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continue:
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%and = and i32 %a, 1023
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ret i32 %and
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exit:
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ret i32 -1
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}
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define i32 @neg1(i32 %a) {
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; CHECK-LABEL: @neg1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp ule i32 [[A:%.*]], 256
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; CHECK-NEXT: br i1 [[CMP]], label [[CONTINUE:%.*]], label [[EXIT:%.*]]
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; CHECK: continue:
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[A]], 255
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; CHECK-NEXT: ret i32 [[AND]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 -1
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;
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entry:
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%cmp = icmp ule i32 %a, 256
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br i1 %cmp, label %continue, label %exit
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continue:
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%and = and i32 %a, 255
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ret i32 %and
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exit:
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ret i32 -1
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}
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define i32 @neg2(i32 %a) {
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; CHECK-LABEL: @neg2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 513
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; CHECK-NEXT: br i1 [[CMP]], label [[CONTINUE:%.*]], label [[EXIT:%.*]]
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; CHECK: continue:
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[A]], 255
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; CHECK-NEXT: ret i32 [[AND]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 -1
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;
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entry:
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%cmp = icmp ult i32 %a, 513
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br i1 %cmp, label %continue, label %exit
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continue:
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%and = and i32 %a, 255
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ret i32 %and
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exit:
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ret i32 -1
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}
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define i32 @neg3(i32 %a) {
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; CHECK-LABEL: @neg3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[A:%.*]], 256
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; CHECK-NEXT: br i1 [[CMP]], label [[CONTINUE:%.*]], label [[EXIT:%.*]]
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; CHECK: continue:
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[A]], 254
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; CHECK-NEXT: ret i32 [[AND]]
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; CHECK: exit:
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; CHECK-NEXT: ret i32 -1
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;
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entry:
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%cmp = icmp ult i32 %a, 256
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br i1 %cmp, label %continue, label %exit
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continue:
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%and = and i32 %a, 254
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ret i32 %and
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exit:
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ret i32 -1
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}
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@ -1023,7 +1023,6 @@ define i1 @smul_and_cmp(i32 %x, i32 %y) #0 {
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; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i32, i1 } [[TMP0]], 0
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; CHECK-NEXT: br label [[CONT3:%.*]]
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; CHECK: cont3:
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; CHECK-NEXT: [[CMP5:%.*]] = and i1 true, true
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; CHECK-NEXT: br label [[OUT]]
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; CHECK: out:
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; CHECK-NEXT: ret i1 true
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@ -745,10 +745,9 @@ target93:
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define i1 @test17_i1(i1 %a) {
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; CHECK-LABEL: @test17_i1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[C:%.*]] = and i1 [[A:%.*]], true
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; CHECK-NEXT: br label [[DISPATCH:%.*]]
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; CHECK: dispatch:
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; CHECK-NEXT: br i1 [[A]], label [[TRUE:%.*]], label [[DISPATCH]]
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; CHECK-NEXT: br i1 [[A:%.*]], label [[TRUE:%.*]], label [[DISPATCH]]
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; CHECK: true:
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; CHECK-NEXT: ret i1 true
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;
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