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[SCEV] Strenthen nowrap flags after constant folding for mul exprs
Same change as 0dda6333175c1749f12be660456ecedade3bcf21, but for mul expressions. We want to first fold any constant operans and then strengthen the nowrap flags, as we can compute more precise flags at that point.
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@ -2684,8 +2684,6 @@ const SCEV *ScalarEvolution::getMulExpr(SmallVectorImpl<const SCEV *> &Ops,
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// Sort by complexity, this groups all similar expression types together.
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GroupByComplexity(Ops, &LI, DT);
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Flags = StrengthenNoWrapFlags(this, scMulExpr, Ops, Flags);
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// If there are any constants, fold them together.
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unsigned Idx = 0;
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if (const SCEVConstant *LHSC = dyn_cast<SCEVConstant>(Ops[0])) {
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@ -2713,6 +2711,8 @@ const SCEV *ScalarEvolution::getMulExpr(SmallVectorImpl<const SCEV *> &Ops,
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return Ops[0];
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}
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Flags = StrengthenNoWrapFlags(this, scMulExpr, Ops, Flags);
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// Limit recursion calls depth.
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if (Depth > MaxArithDepth || hasHugeExpression(Ops))
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return getOrCreateMulExpr(Ops, Flags);
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@ -38,7 +38,7 @@ exit:
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; sure they aren't marked as post-inc users.
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;
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; CHECK-LABEL: IV Users for loop %test1.loop
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; CHECK-NO-LCSSA: %sext.us = {0,+,(16777216 + (-16777216 * %sub.us))<nuw><nsw>,+,33554432}<%test1.loop> (post-inc with loop %test1.loop) in %f = ashr i32 %sext.us, 24
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; CHECK-NO-LCSSA: %sext.us = {0,+,(16777216 + (-16777216 * %sub.us)<nuw><nsw>)<nuw><nsw>,+,33554432}<%test1.loop> (post-inc with loop %test1.loop) in %f = ashr i32 %sext.us, 24
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define i32 @test1(i1 %cond) {
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entry:
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%sub.us = select i1 %cond, i32 0, i32 0
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@ -122,7 +122,7 @@ for.end: ; preds = %for.body
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; LAA: Memory dependences are safe{{$}}
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; LAA: SCEV assumptions:
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; LAA-NEXT: {(2 * (trunc i64 %N to i32)),+,-2}<%for.body> Added Flags: <nusw>
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; LAA-NEXT: {((4 * (zext i31 (trunc i64 %N to i31) to i64)) + %a),+,-4}<%for.body> Added Flags: <nusw>
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; LAA-NEXT: {((4 * (zext i31 (trunc i64 %N to i31) to i64))<nuw><nsw> + %a),+,-4}<%for.body> Added Flags: <nusw>
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; The expression for %mul_ext as analyzed by SCEV is
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; (zext i32 {(2 * (trunc i64 %N to i32)),+,-2}<%for.body> to i64)
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@ -131,7 +131,7 @@ for.end: ; preds = %for.body
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; LAA: [PSE] %arrayidxA = getelementptr i16, i16* %a, i64 %mul_ext:
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; LAA-NEXT: ((2 * (zext i32 {(2 * (trunc i64 %N to i32)),+,-2}<%for.body> to i64))<nuw><nsw> + %a)
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; LAA-NEXT: --> {((4 * (zext i31 (trunc i64 %N to i31) to i64)) + %a),+,-4}<%for.body>
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; LAA-NEXT: --> {((4 * (zext i31 (trunc i64 %N to i31) to i64))<nuw><nsw> + %a),+,-4}<%for.body>
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; LV-LABEL: f2
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; LV-LABEL: for.body.lver.check
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@ -38,6 +38,6 @@ define i64 @test4(i32 %t) {
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%sub = sub i32 %a, %mul
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%zext = zext i32 %sub to i64
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; CHECK: %zext
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; CHECK-NEXT: --> ((-56 * ((zext i32 %t to i64) /u 112)) + ((zext i32 %t to i64) /u 2))
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; CHECK-NEXT: --> ((-56 * ((zext i32 %t to i64) /u 112))<nsw> + ((zext i32 %t to i64) /u 2))
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ret i64 %zext
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}
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@ -10,7 +10,7 @@ define i32 @remove_loop(i32 %size) #0 {
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; CHECK-V8M-NEXT: [[UMIN:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31
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; CHECK-V8M-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMIN]]
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; CHECK-V8M-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 5
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; CHECK-V8M-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], 5
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; CHECK-V8M-NEXT: [[TMP4:%.*]] = shl nuw i32 [[TMP3]], 5
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; CHECK-V8M-NEXT: br label [[WHILE_COND:%.*]]
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; CHECK-V8M: while.cond:
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; CHECK-V8M-NEXT: br i1 false, label [[WHILE_COND]], label [[WHILE_END:%.*]]
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@ -25,7 +25,7 @@ define i32 @remove_loop(i32 %size) #0 {
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; CHECK-V8A-NEXT: [[UMIN:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31
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; CHECK-V8A-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMIN]]
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; CHECK-V8A-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 5
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; CHECK-V8A-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], 5
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; CHECK-V8A-NEXT: [[TMP4:%.*]] = shl nuw i32 [[TMP3]], 5
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; CHECK-V8A-NEXT: br label [[WHILE_COND:%.*]]
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; CHECK-V8A: while.cond:
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; CHECK-V8A-NEXT: br i1 false, label [[WHILE_COND]], label [[WHILE_END:%.*]]
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@ -8,10 +8,10 @@ define i32 @remove_loop(i32 %size) {
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[SIZE:%.*]], 31
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; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[SIZE]], 31
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; CHECK-NEXT: [[UMAX:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31
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; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMAX]]
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; CHECK-NEXT: [[UMIN:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31
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; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMIN]]
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; CHECK-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 5
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; CHECK-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], 5
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; CHECK-NEXT: [[TMP4:%.*]] = shl nuw i32 [[TMP3]], 5
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; CHECK-NEXT: br label [[WHILE_COND:%.*]]
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; CHECK: while.cond:
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; CHECK-NEXT: [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_COND]] ]
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