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[SCEV] Strenthen nowrap flags after constant folding for mul exprs

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Same change as 0dda6333175c1749f12be660456ecedade3bcf21, but for
mul expressions. We want to first fold any constant operans and
then strengthen the nowrap flags, as we can compute more precise
flags at that point.
This commit is contained in:
Nikita Popov 2020-10-25 19:39:07 +01:00
parent 1b8fa86304
commit 049b2e39fb
6 changed files with 11 additions and 11 deletions
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4
lib/Analysis/ScalarEvolution.cpp
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@ -2684,8 +2684,6 @@ const SCEV *ScalarEvolution::getMulExpr(SmallVectorImpl<const SCEV *> &Ops,
// Sort by complexity, this groups all similar expression types together. // Sort by complexity, this groups all similar expression types together.
GroupByComplexity(Ops, &LI, DT); GroupByComplexity(Ops, &LI, DT);
Flags = StrengthenNoWrapFlags(this, scMulExpr, Ops, Flags);
// If there are any constants, fold them together. // If there are any constants, fold them together.
unsigned Idx = 0; unsigned Idx = 0;
if (const SCEVConstant *LHSC = dyn_cast<SCEVConstant>(Ops[0])) { if (const SCEVConstant *LHSC = dyn_cast<SCEVConstant>(Ops[0])) {
@ -2713,6 +2711,8 @@ const SCEV *ScalarEvolution::getMulExpr(SmallVectorImpl<const SCEV *> &Ops,
return Ops[0]; return Ops[0];
} }
Flags = StrengthenNoWrapFlags(this, scMulExpr, Ops, Flags);
// Limit recursion calls depth. // Limit recursion calls depth.
if (Depth > MaxArithDepth || hasHugeExpression(Ops)) if (Depth > MaxArithDepth || hasHugeExpression(Ops))
return getOrCreateMulExpr(Ops, Flags); return getOrCreateMulExpr(Ops, Flags);

2
test/Analysis/IVUsers/quadradic-exit-value.ll
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@ -38,7 +38,7 @@ exit:
; sure they aren't marked as post-inc users. ; sure they aren't marked as post-inc users.
; ;
; CHECK-LABEL: IV Users for loop %test1.loop ; CHECK-LABEL: IV Users for loop %test1.loop
; CHECK-NO-LCSSA: %sext.us = {0,+,(16777216 + (-16777216 * %sub.us))<nuw><nsw>,+,33554432}<%test1.loop> (post-inc with loop %test1.loop) in %f = ashr i32 %sext.us, 24 ; CHECK-NO-LCSSA: %sext.us = {0,+,(16777216 + (-16777216 * %sub.us)<nuw><nsw>)<nuw><nsw>,+,33554432}<%test1.loop> (post-inc with loop %test1.loop) in %f = ashr i32 %sext.us, 24
define i32 @test1(i1 %cond) { define i32 @test1(i1 %cond) {
entry: entry:
%sub.us = select i1 %cond, i32 0, i32 0 %sub.us = select i1 %cond, i32 0, i32 0

4
test/Analysis/LoopAccessAnalysis/wrapping-pointer-versioning.ll
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@ -122,7 +122,7 @@ for.end: ; preds = %for.body
; LAA: Memory dependences are safe{{$}} ; LAA: Memory dependences are safe{{$}}
; LAA: SCEV assumptions: ; LAA: SCEV assumptions:
; LAA-NEXT: {(2 * (trunc i64 %N to i32)),+,-2}<%for.body> Added Flags: <nusw> ; LAA-NEXT: {(2 * (trunc i64 %N to i32)),+,-2}<%for.body> Added Flags: <nusw>
; LAA-NEXT: {((4 * (zext i31 (trunc i64 %N to i31) to i64)) + %a),+,-4}<%for.body> Added Flags: <nusw> ; LAA-NEXT: {((4 * (zext i31 (trunc i64 %N to i31) to i64))<nuw><nsw> + %a),+,-4}<%for.body> Added Flags: <nusw>
; The expression for %mul_ext as analyzed by SCEV is ; The expression for %mul_ext as analyzed by SCEV is
; (zext i32 {(2 * (trunc i64 %N to i32)),+,-2}<%for.body> to i64) ; (zext i32 {(2 * (trunc i64 %N to i32)),+,-2}<%for.body> to i64)
@ -131,7 +131,7 @@ for.end: ; preds = %for.body
; LAA: [PSE] %arrayidxA = getelementptr i16, i16* %a, i64 %mul_ext: ; LAA: [PSE] %arrayidxA = getelementptr i16, i16* %a, i64 %mul_ext:
; LAA-NEXT: ((2 * (zext i32 {(2 * (trunc i64 %N to i32)),+,-2}<%for.body> to i64))<nuw><nsw> + %a) ; LAA-NEXT: ((2 * (zext i32 {(2 * (trunc i64 %N to i32)),+,-2}<%for.body> to i64))<nuw><nsw> + %a)
; LAA-NEXT: --> {((4 * (zext i31 (trunc i64 %N to i31) to i64)) + %a),+,-4}<%for.body> ; LAA-NEXT: --> {((4 * (zext i31 (trunc i64 %N to i31) to i64))<nuw><nsw> + %a),+,-4}<%for.body>
; LV-LABEL: f2 ; LV-LABEL: f2
; LV-LABEL: for.body.lver.check ; LV-LABEL: for.body.lver.check

2
test/Analysis/ScalarEvolution/zext-divrem.ll
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@ -38,6 +38,6 @@ define i64 @test4(i32 %t) {
%sub = sub i32 %a, %mul %sub = sub i32 %a, %mul
%zext = zext i32 %sub to i64 %zext = zext i32 %sub to i64
; CHECK: %zext ; CHECK: %zext
; CHECK-NEXT: --> ((-56 * ((zext i32 %t to i64) /u 112)) + ((zext i32 %t to i64) /u 2)) ; CHECK-NEXT: --> ((-56 * ((zext i32 %t to i64) /u 112))<nsw> + ((zext i32 %t to i64) /u 2))
ret i64 %zext ret i64 %zext
} }

4
test/Transforms/IndVarSimplify/ARM/code-size.ll
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@ -10,7 +10,7 @@ define i32 @remove_loop(i32 %size) #0 {
; CHECK-V8M-NEXT: [[UMIN:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31 ; CHECK-V8M-NEXT: [[UMIN:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31
; CHECK-V8M-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMIN]] ; CHECK-V8M-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMIN]]
; CHECK-V8M-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 5 ; CHECK-V8M-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 5
; CHECK-V8M-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], 5 ; CHECK-V8M-NEXT: [[TMP4:%.*]] = shl nuw i32 [[TMP3]], 5
; CHECK-V8M-NEXT: br label [[WHILE_COND:%.*]] ; CHECK-V8M-NEXT: br label [[WHILE_COND:%.*]]
; CHECK-V8M: while.cond: ; CHECK-V8M: while.cond:
; CHECK-V8M-NEXT: br i1 false, label [[WHILE_COND]], label [[WHILE_END:%.*]] ; CHECK-V8M-NEXT: br i1 false, label [[WHILE_COND]], label [[WHILE_END:%.*]]
@ -25,7 +25,7 @@ define i32 @remove_loop(i32 %size) #0 {
; CHECK-V8A-NEXT: [[UMIN:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31 ; CHECK-V8A-NEXT: [[UMIN:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31
; CHECK-V8A-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMIN]] ; CHECK-V8A-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMIN]]
; CHECK-V8A-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 5 ; CHECK-V8A-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 5
; CHECK-V8A-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], 5 ; CHECK-V8A-NEXT: [[TMP4:%.*]] = shl nuw i32 [[TMP3]], 5
; CHECK-V8A-NEXT: br label [[WHILE_COND:%.*]] ; CHECK-V8A-NEXT: br label [[WHILE_COND:%.*]]
; CHECK-V8A: while.cond: ; CHECK-V8A: while.cond:
; CHECK-V8A-NEXT: br i1 false, label [[WHILE_COND]], label [[WHILE_END:%.*]] ; CHECK-V8A-NEXT: br i1 false, label [[WHILE_COND]], label [[WHILE_END:%.*]]

6
test/Transforms/IndVarSimplify/replace-loop-exit-folds.ll
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@ -8,10 +8,10 @@ define i32 @remove_loop(i32 %size) {
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[SIZE:%.*]], 31 ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[SIZE:%.*]], 31
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[SIZE]], 31 ; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[SIZE]], 31
; CHECK-NEXT: [[UMAX:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31 ; CHECK-NEXT: [[UMIN:%.*]] = select i1 [[TMP1]], i32 [[SIZE]], i32 31
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMAX]] ; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UMIN]]
; CHECK-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 5 ; CHECK-NEXT: [[TMP3:%.*]] = lshr i32 [[TMP2]], 5
; CHECK-NEXT: [[TMP4:%.*]] = shl i32 [[TMP3]], 5 ; CHECK-NEXT: [[TMP4:%.*]] = shl nuw i32 [[TMP3]], 5
; CHECK-NEXT: br label [[WHILE_COND:%.*]] ; CHECK-NEXT: br label [[WHILE_COND:%.*]]
; CHECK: while.cond: ; CHECK: while.cond:
; CHECK-NEXT: [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_COND]] ] ; CHECK-NEXT: [[SIZE_ADDR_0:%.*]] = phi i32 [ [[SIZE]], [[ENTRY:%.*]] ], [ [[SUB:%.*]], [[WHILE_COND]] ]