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Revert "[DAGCombiner] fold shift-trunc-shift to shift-mask-trunc"

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This reverts commit 8963332c3327daa652ba3e26d35f9109b6991985.
There was a logic bug typo in this code, but it wasn't visible in the asm for the tests.
This commit is contained in:
Sanjay Patel 2019-12-12 16:19:37 -05:00
parent 183b3675ca
commit 05003a5b3c
3 changed files with 4 additions and 14 deletions
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12
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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@ -7943,18 +7943,6 @@ SDValue DAGCombiner::visitSRL(SDNode *N) {
InnerShift.getOperand(0), NewShiftAmt);
return DAG.getNode(ISD::TRUNCATE, DL, VT, NewShift);
}
// In the more general case, we can clear the high bits after the shift:
// srl (trunc (srl x, c1)), c2 --> trunc (and (srl x, (c1+c2)), Mask)
if (N0.hasOneUse() && InnerShift.hasOneUse() && c1 + c2 <= OpSizeInBits) {
SDLoc DL(N);
SDValue NewShiftAmt = DAG.getConstant(c1 + c2, DL, ShiftAmtVT);
SDValue NewShift = DAG.getNode(ISD::SRL, DL, InnerShiftVT,
InnerShift.getOperand(0), NewShiftAmt);
SDValue Mask = DAG.getConstant((1 << (InnerShiftSize - c2)) - 1, DL,
InnerShiftVT);
SDValue And = DAG.getNode(ISD::AND, DL, InnerShiftVT, NewShift, Mask);
return DAG.getNode(ISD::TRUNCATE, DL, VT, And);
}
}
}

3
test/CodeGen/AArch64/shift-amount-mod.ll
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@ -670,7 +670,8 @@ define i64 @reg64_lshr_by_masked_negated_unfolded_add_b(i64 %val, i64 %a, i64 %b
define i32 @t(i64 %x) {
; CHECK-LABEL: t:
; CHECK: // %bb.0:
; CHECK-NEXT: ubfx x0, x0, #17, #28
; CHECK-NEXT: lsr x8, x0, #13
; CHECK-NEXT: ubfx x0, x8, #4, #28
; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0
; CHECK-NEXT: ret
%s = lshr i64 %x, 13

3
test/CodeGen/PowerPC/trunc-srl-load.ll
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@ -25,7 +25,8 @@ cond.false: ; preds = %entry
define i32 @sh_trunc_sh(i64 %x) {
; CHECK-LABEL: sh_trunc_sh:
; CHECK: # %bb.0:
; CHECK-NEXT: rldicl 3, 3, 47, 36
; CHECK-NEXT: rldicl 3, 3, 51, 13
; CHECK-NEXT: srwi 3, 3, 4
; CHECK-NEXT: blr
%s = lshr i64 %x, 13
%t = trunc i64 %s to i32