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[X86][SSE] Split SimplifyDemandedBitsForTargetNode X86ISD::VSRLI/VSRAI handling.

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First step towards adding more capable combines to fix comments in D55768.

llvm-svn: 349400
This commit is contained in:
Simon Pilgrim 2018-12-17 21:36:17 +00:00
parent ab4a35a650
commit 0539c4cc77
1 changed files with 16 additions and 3 deletions
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19
lib/Target/X86/X86ISelLowering.cpp
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@ -32410,8 +32410,22 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
}
break;
}
case X86ISD::VSRAI:
case X86ISD::VSRLI: {
if (auto *ShiftImm = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
if (ShiftImm->getAPIntValue().uge(BitWidth))
break;
KnownBits KnownOp;
unsigned ShAmt = ShiftImm->getZExtValue();
APInt DemandedMask = OriginalDemandedBits << ShAmt;
if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask,
OriginalDemandedElts, KnownOp, TLO, Depth + 1))
return true;
}
break;
}
case X86ISD::VSRAI: {
if (auto *ShiftImm = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
if (ShiftImm->getAPIntValue().uge(BitWidth))
break;
@ -32422,8 +32436,7 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
// If any of the demanded bits are produced by the sign extension, we also
// demand the input sign bit.
if (Opc == X86ISD::VSRAI &&
OriginalDemandedBits.countLeadingZeros() < ShAmt)
if (OriginalDemandedBits.countLeadingZeros() < ShAmt)
DemandedMask.setSignBit();
if (SimplifyDemandedBits(Op.getOperand(0), DemandedMask,