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[AMDGPU] Preliminary patch for divergence driven instruction selection. Inline immediate move to V_MADAK_F32.
Differential revision: https://reviews.llvm.org/D51586 Reviewer: rampitec llvm-svn: 341843
This commit is contained in:
Alexander Timofeev
parent
7578ed61eb
commit
0547c6d3de
@ -2066,12 +2066,40 @@ bool SIInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
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if (Src2->isReg() && Src2->getReg() == Reg) {
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// Not allowed to use constant bus for another operand.
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// We can however allow an inline immediate as src0.
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if (!Src0->isImm() &&
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(Src0->isReg() && RI.isSGPRClass(MRI->getRegClass(Src0->getReg()))))
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return false;
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bool Src0Inlined = false;
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if (Src0->isReg()) {
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// Try to inline constant if possible.
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// If the Def moves immediate and the use is single
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// We are saving VGPR here.
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MachineInstr *Def = MRI->getUniqueVRegDef(Src0->getReg());
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if (Def && Def->isMoveImmediate() &&
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isInlineConstant(Def->getOperand(1)) &&
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MRI->hasOneUse(Src0->getReg())) {
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Src0->ChangeToImmediate(Def->getOperand(1).getImm());
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Src0Inlined = true;
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} else if ((RI.isPhysicalRegister(Src0->getReg()) &&
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RI.isSGPRClass(RI.getPhysRegClass(Src0->getReg()))) ||
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(RI.isVirtualRegister(Src0->getReg()) &&
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RI.isSGPRClass(MRI->getRegClass(Src0->getReg()))))
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return false;
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// VGPR is okay as Src0 - fallthrough
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}
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if (!Src1->isReg() || RI.isSGPRClass(MRI->getRegClass(Src1->getReg())))
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return false;
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if (Src1->isReg() && !Src0Inlined ) {
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// We have one slot for inlinable constant so far - try to fill it
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MachineInstr *Def = MRI->getUniqueVRegDef(Src1->getReg());
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if (Def && Def->isMoveImmediate() &&
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isInlineConstant(Def->getOperand(1)) &&
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MRI->hasOneUse(Src1->getReg()) &&
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commuteInstruction(UseMI)) {
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Src0->ChangeToImmediate(Def->getOperand(1).getImm());
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} else if ((RI.isPhysicalRegister(Src1->getReg()) &&
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RI.isSGPRClass(RI.getPhysRegClass(Src1->getReg()))) ||
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(RI.isVirtualRegister(Src1->getReg()) &&
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RI.isSGPRClass(MRI->getRegClass(Src1->getReg()))))
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return false;
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// VGPR is okay as Src1 - fallthrough
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}
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const int64_t Imm = ImmOp->getImm();
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185
test/CodeGen/AMDGPU/madak-inline-constant.mir
Normal file
185
test/CodeGen/AMDGPU/madak-inline-constant.mir
Normal file
@ -0,0 +1,185 @@
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# RUN: llc -march=amdgcn -run-pass peephole-opt -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
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# GCN-LABEL: bb.0:
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# GCN: V_MOV_B32_e32 1092616192
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# GCN: S_MOV_B32 1082130432
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# GCN: %3:vgpr_32 = V_MADAK_F32 1082130432, killed %0, 1092616192, implicit $exec
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---
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name: test src1-inlined
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0_sgpr1
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%0:vgpr_32 = COPY $vgpr0
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%17:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec
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%18:sreg_32 = S_MOV_B32 1082130432
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%19:vgpr_32 = V_MAC_F32_e64 0, killed %0, 0, killed %18, 0, %17, 0, 0, implicit $exec
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...
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# GCN-LABEL: bb.0:
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# GCN: V_MOV_B32_e32 1092616192
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# GCN: S_MOV_B32 1082130432
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# GCN: %3:vgpr_32 = V_MADAK_F32 1082130432, killed %0, 1092616192, implicit $exec
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---
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name: test src0-inlined
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0_sgpr1
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%0:vgpr_32 = COPY $vgpr0
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%17:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec
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%18:sreg_32 = S_MOV_B32 1082130432
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%19:vgpr_32 = V_MAC_F32_e64 0, killed %18, 0, killed %0, 0, %17, 0, 0, implicit $exec
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...
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# GCN-LABEL: bb.0:
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# GCN: V_MOV_B32_e32 1092616192
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# GCN: S_MOV_B32 1082130432
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# GCN: %3:vgpr_32 = V_MADAK_F32 killed %0, killed %0, 1092616192, implicit $exec
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---
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name: test none-inlined
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0_sgpr1
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%0:vgpr_32 = COPY $vgpr0
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%17:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec
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%18:sreg_32 = S_MOV_B32 1082130432
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%19:vgpr_32 = V_MAC_F32_e64 0, killed %0, 0, killed %0, 0, %17, 0, 0, implicit $exec
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...
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# GCN-LABEL: bb.0:
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# GCN: V_MOV_B32_e32 1092616192
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# GCN: V_MOV_B32_e32 1082130432
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# GCN: %3:vgpr_32 = V_MADAK_F32 1082130432, killed %0, 1092616192, implicit $exec
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---
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name: test src1-2vgprs-inlined
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0_sgpr1
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%0:vgpr_32 = COPY $vgpr0
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%17:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec
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%18:vgpr_32 = V_MOV_B32_e32 1082130432, implicit $exec
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%19:vgpr_32 = V_MAC_F32_e64 0, killed %0, 0, killed %18, 0, %17, 0, 0, implicit $exec
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...
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# GCN-LABEL: bb.0:
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# GCN: V_MOV_B32_e32 1092616192
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# GCN: V_MOV_B32_e32 1082130432
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# GCN: %3:vgpr_32 = V_MADAK_F32 1082130432, killed %0, 1092616192, implicit $exec
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---
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name: test src0-2vgprs-inlined
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0_sgpr1
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%0:vgpr_32 = COPY $vgpr0
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%17:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec
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%18:vgpr_32 = V_MOV_B32_e32 1082130432, implicit $exec
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%19:vgpr_32 = V_MAC_F32_e64 0, killed %18, 0, killed %0, 0, %17, 0, 0, implicit $exec
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...
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# GCN-LABEL: bb.0:
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# GCN: V_MOV_B32_e32 1092616192, implicit $exec
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# GCN: S_MOV_B32 1082130432
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# GCN: V_MADAK_F32 1082130432, killed $vgpr1, 1092616192, implicit $exec
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---
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name: test src0-phys-vgpr
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0_sgpr1
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$vgpr1 = COPY $vgpr0
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%17:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec
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%18:sgpr_32 = S_MOV_B32 1082130432
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%19:vgpr_32 = V_MAC_F32_e64 0, killed $vgpr1, 0, killed %18, 0, %17, 0, 0, implicit $exec
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...
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# GCN-LABEL: bb.0:
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# GCN: V_MOV_B32_e32 1092616192, implicit $exec
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# GCN: S_MOV_B32 1082130432
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# GCN: V_MADAK_F32 1082130432, killed $vgpr0, 1092616192, implicit $exec
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---
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name: test src1-phys-vgpr
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0_sgpr1
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%0:vgpr_32 = COPY $vgpr0
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%17:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec
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%18:sgpr_32 = S_MOV_B32 1082130432
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%19:vgpr_32 = V_MAC_F32_e64 0, killed %18, 0, killed $vgpr0, 0, %17, 0, 0, implicit $exec
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...
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# GCN-LABEL: bb.0:
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# GCN: V_MOV_B32_e32 1092616192, implicit $exec
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# GCN: V_MAC_F32_e64 0, killed $sgpr2, 0, killed %0, 0, %1, 0, 0, implicit $exec
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---
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name: test src0-phys-sgpr
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0_sgpr1, $sgpr2
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%0:vgpr_32 = COPY $vgpr0
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%17:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec
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%19:vgpr_32 = V_MAC_F32_e64 0, killed $sgpr2, 0, killed %0, 0, %17, 0, 0, implicit $exec
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...
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# GCN-LABEL: bb.0:
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# GCN: V_MOV_B32_e32 1092616192, implicit $exec
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# GCN: V_MAC_F32_e64 0, killed %0, 0, killed $sgpr2, 0, %1, 0, 0, implicit $exec
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---
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name: test src1-phys-sgpr
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0_sgpr1, $sgpr2
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%0:vgpr_32 = COPY $vgpr0
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%17:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec
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%19:vgpr_32 = V_MAC_F32_e64 0, killed %0, 0, killed $sgpr2, 0, %17, 0, 0, implicit $exec
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...
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# GCN-LABEL: bb.0:
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# GCN: V_MOV_B32_e32 1092616192, implicit $exec
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# GCN: $sgpr2 = S_MOV_B32 1082130432
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# GCN: V_MADAK_F32 1082130432, killed %0, 1092616192, implicit $exec
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---
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name: test src1-phys-sgpr-move
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body: |
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bb.0:
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liveins: $vgpr0, $sgpr0_sgpr1
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%0:vgpr_32 = COPY $vgpr0
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%17:vgpr_32 = V_MOV_B32_e32 1092616192, implicit $exec
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$sgpr2 = S_MOV_B32 1082130432
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%19:vgpr_32 = V_MAC_F32_e64 0, killed %0, 0, killed $sgpr2, 0, %17, 0, 0, implicit $exec
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...
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