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[InstCombine] Add vector urem tests

Demonstrate missed opportunity for urem -> and combine for powerof2 or zero non-uniform constant dividers

llvm-svn: 288510
This commit is contained in:
Simon Pilgrim 2016-12-02 17:16:21 +00:00
parent 4306301707
commit 05718aa6c9

View File

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
define <4 x i32> @test_v4i32_splatconst_pow2(<4 x i32> %a0) {
; CHECK-LABEL: @test_v4i32_splatconst_pow2(
; CHECK-NEXT: [[TMP1:%.*]] = and <4 x i32> %a0, <i32 1, i32 1, i32 1, i32 1>
; CHECK-NEXT: ret <4 x i32> [[TMP1]]
;
%1 = urem <4 x i32> %a0, <i32 2, i32 2, i32 2, i32 2>
ret <4 x i32> %1
}
define <4 x i32> @test_v4i32_const_pow2(<4 x i32> %a0) {
; CHECK-LABEL: @test_v4i32_const_pow2(
; CHECK-NEXT: [[TMP1:%.*]] = urem <4 x i32> %a0, <i32 1, i32 2, i32 4, i32 8>
; CHECK-NEXT: ret <4 x i32> [[TMP1]]
;
%1 = urem <4 x i32> %a0, <i32 1, i32 2, i32 4, i32 8>
ret <4 x i32> %1
}
define <4 x i32> @test_v4i32_const_pow2_or_zero(<4 x i32> %a0) {
; CHECK-LABEL: @test_v4i32_const_pow2_or_zero(
; CHECK-NEXT: [[TMP1:%.*]] = urem <4 x i32> %a0, <i32 1, i32 2, i32 0, i32 8>
; CHECK-NEXT: ret <4 x i32> [[TMP1]]
;
%1 = urem <4 x i32> %a0, <i32 1, i32 2, i32 0, i32 8>
ret <4 x i32> %1
}