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Rewrite a terrible comment about the machine model.
llvm-svn: 202576
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@ -32,12 +32,16 @@ struct MCProcResourceDesc {
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// Number of resources that may be buffered.
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//
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// Buffered resources (BufferSize > 0 || BufferSize == -1) may be consumed at
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// some indeterminate cycle after dispatch (e.g. for instructions that may
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// issue out-of-order). Unbuffered resources (BufferSize == 0) always consume
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// their resource some fixed number of cycles after dispatch (e.g. for
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// instruction interlocking that may stall the pipeline). If BufferSize==1,
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// the latency between producer and consumer is modeled as a stall.
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// Buffered resources (BufferSize != 0) may be consumed at some indeterminate
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// cycle after dispatch. This should be used for out-of-order cpus when
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// instructions that use this resource can be buffered in a reservaton
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// station.
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//
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// Unbuffered resources (BufferSize == 0) always consume their resource some
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// fixed number of cycles after dispatch. If a resource is unbuffered, then
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// the scheduler will avoid scheduling instructions with conflicting resources
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// in the same cycle. This is for in-order cpus, or the in-order portion of
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// an out-of-order cpus.
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int BufferSize;
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bool operator==(const MCProcResourceDesc &Other) const {
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