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[X86] Add combineX86ShufflesRecursively helper. NFCI.
combineX86ShufflesRecursively is pretty cumbersome with a lot of arguments that only matter later in recursion. This commit adds a wrapper version that only takes the initial root Op to simplify calls that don't need to worry about these. An early, cleanup step towards merging combineX86ShufflesRecursively into SimplifyDemandedVectorElts/SimplifyDemandedBits. llvm-svn: 351352
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@ -31624,6 +31624,14 @@ static SDValue combineX86ShufflesRecursively(
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AllowVariableMask, DAG, Subtarget);
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}
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/// Helper entry wrapper to combineX86ShufflesRecursively.
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static SDValue combineX86ShufflesRecursively(SDValue Op, SelectionDAG &DAG,
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const X86Subtarget &Subtarget) {
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return combineX86ShufflesRecursively({Op}, 0, Op, {0}, {}, /*Depth*/ 1,
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/*HasVarMask*/ false,
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/*AllowVarMask*/ true, DAG, Subtarget);
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}
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/// Get the PSHUF-style mask from PSHUF node.
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///
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/// This is a very minor wrapper around getTargetShuffleMask to easy forming v4
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@ -32434,9 +32442,7 @@ static SDValue combineShuffle(SDNode *N, SelectionDAG &DAG,
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// specific PSHUF instruction sequences into their minimal form so that we
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// can evaluate how many specialized shuffle instructions are involved in
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// a particular chain.
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if (SDValue Res = combineX86ShufflesRecursively(
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{Op}, 0, Op, {0}, {}, /*Depth*/ 1,
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/*HasVarMask*/ false, /*AllowVarMask*/ true, DAG, Subtarget))
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if (SDValue Res = combineX86ShufflesRecursively(Op, DAG, Subtarget))
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return Res;
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// Simplify source operands based on shuffle mask.
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@ -35819,10 +35825,7 @@ static SDValue combineVectorPack(SDNode *N, SelectionDAG &DAG,
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// Attempt to combine as shuffle.
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SDValue Op(N, 0);
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if (SDValue Res =
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combineX86ShufflesRecursively({Op}, 0, Op, {0}, {}, /*Depth*/ 1,
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/*HasVarMask*/ false,
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/*AllowVarMask*/ true, DAG, Subtarget))
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if (SDValue Res = combineX86ShufflesRecursively(Op, DAG, Subtarget))
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return Res;
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return SDValue();
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@ -35898,9 +35901,7 @@ static SDValue combineVectorShiftImm(SDNode *N, SelectionDAG &DAG,
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// We can decode 'whole byte' logical bit shifts as shuffles.
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if (LogicalShift && (ShiftVal % 8) == 0) {
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SDValue Op(N, 0);
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if (SDValue Res = combineX86ShufflesRecursively(
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{Op}, 0, Op, {0}, {}, /*Depth*/ 1,
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/*HasVarMask*/ false, /*AllowVarMask*/ true, DAG, Subtarget))
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if (SDValue Res = combineX86ShufflesRecursively(Op, DAG, Subtarget))
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return Res;
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}
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@ -35941,10 +35942,7 @@ static SDValue combineVectorInsert(SDNode *N, SelectionDAG &DAG,
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// Attempt to combine PINSRB/PINSRW patterns to a shuffle.
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SDValue Op(N, 0);
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if (SDValue Res =
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combineX86ShufflesRecursively({Op}, 0, Op, {0}, {}, /*Depth*/ 1,
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/*HasVarMask*/ false,
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/*AllowVarMask*/ true, DAG, Subtarget))
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if (SDValue Res = combineX86ShufflesRecursively(Op, DAG, Subtarget))
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return Res;
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return SDValue();
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@ -36461,9 +36459,7 @@ static SDValue combineAnd(SDNode *N, SelectionDAG &DAG,
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// Attempt to recursively combine a bitmask AND with shuffles.
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if (VT.isVector() && (VT.getScalarSizeInBits() % 8) == 0) {
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SDValue Op(N, 0);
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if (SDValue Res = combineX86ShufflesRecursively(
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{Op}, 0, Op, {0}, {}, /*Depth*/ 1,
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/*HasVarMask*/ false, /*AllowVarMask*/ true, DAG, Subtarget))
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if (SDValue Res = combineX86ShufflesRecursively(Op, DAG, Subtarget))
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return Res;
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}
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@ -36777,9 +36773,7 @@ static SDValue combineOr(SDNode *N, SelectionDAG &DAG,
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// Attempt to recursively combine an OR of shuffles.
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if (VT.isVector() && (VT.getScalarSizeInBits() % 8) == 0) {
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SDValue Op(N, 0);
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if (SDValue Res = combineX86ShufflesRecursively(
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{Op}, 0, Op, {0}, {}, /*Depth*/ 1,
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/*HasVarMask*/ false, /*AllowVarMask*/ true, DAG, Subtarget))
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if (SDValue Res = combineX86ShufflesRecursively(Op, DAG, Subtarget))
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return Res;
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}
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@ -39083,9 +39077,7 @@ static SDValue combineAndnp(SDNode *N, SelectionDAG &DAG,
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// Attempt to recursively combine a bitmask ANDNP with shuffles.
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if (VT.isVector() && (VT.getScalarSizeInBits() % 8) == 0) {
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SDValue Op(N, 0);
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if (SDValue Res = combineX86ShufflesRecursively(
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{Op}, 0, Op, {0}, {}, /*Depth*/ 1,
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/*HasVarMask*/ false, /*AllowVarMask*/ true, DAG, Subtarget))
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if (SDValue Res = combineX86ShufflesRecursively(Op, DAG, Subtarget))
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return Res;
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}
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