From 05ef2c122d4a4ae3805bbb8229007d30b6c48ab0 Mon Sep 17 00:00:00 2001
From: Owen Anderson <resistor@mac.com>
Date: Mon, 12 Sep 2011 18:56:30 +0000
Subject: [PATCH] Port more encoding tests to decoding tests, and correct an
 improper Thumb2 pre-indexed load decoding this uncovered.

llvm-svn: 139522
---
 lib/Target/ARM/ARMInstrFormats.td             |   4 +
 .../ARM/Disassembler/ARMDisassembler.cpp      |  32 ++
 test/MC/Disassembler/ARM/thumb2.txt           | 509 ++++++++++++++++++
 3 files changed, 545 insertions(+)

diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td
index 67a74e04b1d..08a9ebdf084 100644
--- a/lib/Target/ARM/ARMInstrFormats.td
+++ b/lib/Target/ARM/ARMInstrFormats.td
@@ -1189,6 +1189,8 @@ class T2Ipreldst<bit signed, bits<2> opcod, bit load, bit pre,
   let Inst{9}     = addr{8}; // Sign bit
   let Inst{8}     = 1; // The W bit.
   let Inst{7-0}   = addr{7-0};
+
+  let DecoderMethod = "DecodeT2LdStPre";
 }
 
 // T2Ipostldst - Thumb2 post-indexed load / store instructions.
@@ -1221,6 +1223,8 @@ class T2Ipostldst<bit signed, bits<2> opcod, bit load, bit pre,
   let Inst{9}     = offset{8}; // Sign bit
   let Inst{8}     = 1; // The W bit.
   let Inst{7-0}   = offset{7-0};
+
+  let DecoderMethod = "DecodeT2LdStPre";
 }
 
 // Tv5Pat - Same as Pat<>, but requires V5T Thumb mode.
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index da5b6b86aac..9d4449a4aa1 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -301,6 +301,9 @@ static DecodeStatus DecodeT2STRDPreInstruction(llvm::MCInst &Inst,unsigned Insn,
                                uint64_t Address, const void *Decoder);
 static DecodeStatus DecodeT2Adr(llvm::MCInst &Inst, unsigned Val,
                                 uint64_t Address, const void *Decoder);
+static DecodeStatus DecodeT2LdStPre(llvm::MCInst &Inst, unsigned Val,
+                                uint64_t Address, const void *Decoder);
+
 
 #include "ARMGenDisassemblerTables.inc"
 #include "ARMGenInstrInfo.inc"
@@ -2755,6 +2758,35 @@ static DecodeStatus DecodeT2AddrModeImm8(llvm::MCInst &Inst, unsigned Val,
   return S;
 }
 
+static DecodeStatus DecodeT2LdStPre(llvm::MCInst &Inst, unsigned Insn,
+                                    uint64_t Address, const void *Decoder) {
+  DecodeStatus S = MCDisassembler::Success;
+
+  unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
+  unsigned Rn = fieldFromInstruction32(Insn, 16, 4);
+  unsigned addr = fieldFromInstruction32(Insn, 0, 8);
+  addr |= fieldFromInstruction32(Insn, 9, 1) << 8;
+  addr |= Rn << 9;
+  unsigned load = fieldFromInstruction32(Insn, 20, 1);
+
+  if (!load) {
+    if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
+      return MCDisassembler::Fail;
+  }
+
+  if (!Check(S, DecodeGPRRegisterClass(Inst, Rt, Address, Decoder)))
+    return MCDisassembler::Fail;
+
+  if (load) {
+    if (!Check(S, DecodeGPRRegisterClass(Inst, Rn, Address, Decoder)))
+      return MCDisassembler::Fail;
+  }
+
+  if (!Check(S, DecodeT2AddrModeImm8(Inst, addr, Address, Decoder)))
+    return MCDisassembler::Fail;
+
+  return S;
+}
 
 static DecodeStatus DecodeT2AddrModeImm12(llvm::MCInst &Inst, unsigned Val,
                                   uint64_t Address, const void *Decoder) {
diff --git a/test/MC/Disassembler/ARM/thumb2.txt b/test/MC/Disassembler/ARM/thumb2.txt
index 806c44f2b17..9618a8736e6 100644
--- a/test/MC/Disassembler/ARM/thumb2.txt
+++ b/test/MC/Disassembler/ARM/thumb2.txt
@@ -408,6 +408,514 @@
 
 0xbf 0xf3 0x6f 0x8f
 
+#------------------------------------------------------------------------------
+# LDMIA
+#------------------------------------------------------------------------------
+# CHECK: ldm.w r4, {r4, r5, r8, r9}
+# CHECK: ldm.w r4, {r5, r6}
+# CHECK: ldm.w r5!, {r3, r8}
+# CHECK: ldm.w r4, {r4, r5, r8, r9}
+# CHECK: ldm.w r4, {r5, r6}
+# CHECK: ldm.w r5!, {r3, r8}
+# CHECK: ldm.w r5!, {r1, r2}
+# CHECK: ldm.w r2, {r1, r2}
+
+# CHECK: ldm.w r4, {r4, r5, r8, r9}
+# CHECK: ldm.w r4, {r5, r6}
+# CHECK: ldm.w r5!, {r3, r8}
+# CHECK: ldm.w r4, {r4, r5, r8, r9}
+# CHECK: ldm.w r4, {r5, r6}
+# CHECK: ldm.w r5!, {r3, r8}
+# CHECK: ldm.w r5!, {r3, r8}
+
+0x94 0xe8 0x30 0x03
+0x94 0xe8 0x60 0x00
+0xb5 0xe8 0x08 0x01
+0x94 0xe8 0x30 0x03
+0x94 0xe8 0x60 0x00
+0xb5 0xe8 0x08 0x01
+0xb5 0xe8 0x06 0x00
+0x92 0xe8 0x06 0x00
+
+0x94 0xe8 0x30 0x03
+0x94 0xe8 0x60 0x00
+0xb5 0xe8 0x08 0x01
+0x94 0xe8 0x30 0x03
+0x94 0xe8 0x60 0x00
+0xb5 0xe8 0x08 0x01
+0xb5 0xe8 0x08 0x01
+
+
+#------------------------------------------------------------------------------
+# LDMDB
+#------------------------------------------------------------------------------
+# CHECK: ldmdb r4, {r4, r5, r8, r9}
+# CHECK: ldmdb r4, {r5, r6}
+# CHECK: ldmdb r5!, {r3, r8}
+# CHECK: ldmdb r5!, {r3, r8}
+
+0x14 0xe9 0x30 0x03
+0x14 0xe9 0x60 0x00
+0x35 0xe9 0x08 0x01
+0x35 0xe9 0x08 0x01
+
+
+#------------------------------------------------------------------------------
+# LDR(immediate)
+#------------------------------------------------------------------------------
+# CHECK: ldr r5, [r5, #-4]
+# CHECK: ldr r5, [r6, #32]
+# CHECK: ldr.w r5, [r6, #33]
+# CHECK: ldr.w r5, [r6, #257]
+# CHECK: ldr.w pc, [r7, #257]
+
+0x55 0xf8 0x04 0x5c
+0x35 0x6a
+0xd6 0xf8 0x21 0x50
+0xd6 0xf8 0x01 0x51
+0xd7 0xf8 0x01 0xf1
+
+
+#------------------------------------------------------------------------------
+# LDR(register)
+#------------------------------------------------------------------------------
+# CHECK: ldr.w r1, [r8, r1]
+# CHECK: ldr.w r4, [r5, r2]
+# CHECK: ldr.w r6, [r0, r2, lsl #3]
+# CHECK: ldr.w r8, [r8, r2, lsl #2]
+# CHECK: ldr.w r7, [sp, r2, lsl #1]
+# CHECK: ldr.w r7, [sp, r2]
+# CHECK: ldr r2, [r4, #255]!
+# CHECK: ldr r8, [sp, #4]!
+# CHECK: ldr lr, [sp, #-4]!
+# CHECK: ldr r2, [r4], #255
+# CHECK: ldr r8, [sp], #4
+# CHECK: ldr lr, [sp], #-4
+
+0x58 0xf8 0x01 0x10
+0x55 0xf8 0x02 0x40
+0x50 0xf8 0x32 0x60
+0x58 0xf8 0x22 0x80
+0x5d 0xf8 0x12 0x70
+0x5d 0xf8 0x02 0x70
+0x54 0xf8 0xff 0x2f
+0x5d 0xf8 0x04 0x8f
+0x5d 0xf8 0x04 0xed
+0x54 0xf8 0xff 0x2b
+0x5d 0xf8 0x04 0x8b
+0x5d 0xf8 0x04 0xe9
+
+
+#------------------------------------------------------------------------------
+# LDRB(immediate)
+#------------------------------------------------------------------------------
+# CHECK: ldrb r5, [r5, #-4]
+# CHECK: ldrb.w r5, [r6, #32]
+# CHECK: ldrb.w r5, [r6, #33]
+# CHECK: ldrb.w r5, [r6, #257]
+# CHECK: ldrb.w lr, [r7, #257]
+
+0x15 0xf8 0x04 0x5c
+0x96 0xf8 0x20 0x50
+0x96 0xf8 0x21 0x50
+0x96 0xf8 0x01 0x51
+0x97 0xf8 0x01 0xe1
+
+
+#------------------------------------------------------------------------------
+# LDRB(register)
+#------------------------------------------------------------------------------
+# CHECK: ldrb.w r1, [r8, r1]
+# CHECK: ldrb.w r4, [r5, r2]
+# CHECK: ldrb.w r6, [r0, r2, lsl #3]
+# CHECK: ldrb.w r8, [r8, r2, lsl #2]
+# CHECK: ldrb.w r7, [sp, r2, lsl #1]
+# CHECK: ldrb.w r7, [sp, r2]
+# CHECK: ldrb r5, [r8, #255]!
+# CHECK: ldrb r2, [r5, #4]!
+# CHECK: ldrb r1, [r4, #-4]!
+# CHECK: ldrb lr, [r3], #255
+# CHECK: ldrb r9, [r2], #4
+# CHECK: ldrb r3, [sp], #-4
+
+0x18 0xf8 0x01 0x10
+0x15 0xf8 0x02 0x40
+0x10 0xf8 0x32 0x60
+0x18 0xf8 0x22 0x80
+0x1d 0xf8 0x12 0x70
+0x1d 0xf8 0x02 0x70
+0x18 0xf8 0xff 0x5f
+0x15 0xf8 0x04 0x2f
+0x14 0xf8 0x04 0x1d
+0x13 0xf8 0xff 0xeb
+0x12 0xf8 0x04 0x9b
+0x1d 0xf8 0x04 0x39
+
+
+#------------------------------------------------------------------------------
+# LDRBT
+#------------------------------------------------------------------------------
+# CHECK: ldrbt r1, [r2]
+# CHECK: ldrbt r1, [r8]
+# CHECK: ldrbt r1, [r8, #3]
+# CHECK: ldrbt r1, [r8, #255]
+
+0x12 0xf8 0x00 0x1e
+0x18 0xf8 0x00 0x1e
+0x18 0xf8 0x03 0x1e
+0x18 0xf8 0xff 0x1e
+
+
+#------------------------------------------------------------------------------
+# LDRD(immediate)
+#------------------------------------------------------------------------------
+# CHECK: ldrd r3, r5, [r6, #24]
+# CHECK: ldrd r3, r5, [r6, #24]!
+# CHECK: ldrd r3, r5, [r6], #4
+# CHECK: ldrd r3, r5, [r6], #-8
+# CHECK: ldrd r3, r5, [r6]
+# CHECK: ldrd r8, r1, [r3]
+
+0xd6 0xe9 0x06 0x35
+0xf6 0xe9 0x06 0x35
+0xf6 0xe8 0x01 0x35
+0x76 0xe8 0x02 0x35
+0xd6 0xe9 0x00 0x35
+0xd3 0xe9 0x00 0x81
+
+
+#------------------------------------------------------------------------------
+# FIXME: LDRD(literal)
+#------------------------------------------------------------------------------
+
+
+#------------------------------------------------------------------------------
+# LDREX/LDREXB/LDREXH/LDREXD
+#------------------------------------------------------------------------------
+# CHECK: ldrex r1, [r4]
+# CHECK: ldrex r8, [r4]
+# CHECK: ldrex r2, [sp, #128]
+# CHECK: ldrexb r5, [r7]
+# CHECK: ldrexh r9, [r12]
+# CHECK: ldrexd r9, r3, [r4]
+
+0x54 0xe8 0x00 0x1f
+0x54 0xe8 0x00 0x8f
+0x5d 0xe8 0x20 0x2f
+0xd7 0xe8 0x4f 0x5f
+0xdc 0xe8 0x5f 0x9f
+0xd4 0xe8 0x7f 0x93
+
+
+#------------------------------------------------------------------------------
+# LDRH(immediate)
+#------------------------------------------------------------------------------
+# CHECK: ldrh r5, [r5, #-4]
+# CHECK: ldrh r5, [r6, #32]
+# CHECK: ldrh.w r5, [r6, #33]
+# CHECK: ldrh.w r5, [r6, #257]
+# CHECK: ldrh.w lr, [r7, #257]
+
+0x35 0xf8 0x04 0x5c
+0x35 0x8c
+0xb6 0xf8 0x21 0x50
+0xb6 0xf8 0x01 0x51
+0xb7 0xf8 0x01 0xe1
+
+
+#------------------------------------------------------------------------------
+# LDRH(register)
+#------------------------------------------------------------------------------
+# CHECK: ldrh.w r1, [r8, r1]
+# CHECK: ldrh.w r4, [r5, r2]
+# CHECK: ldrh.w r6, [r0, r2, lsl #3]
+# CHECK: ldrh.w r8, [r8, r2, lsl #2]
+# CHECK: ldrh.w r7, [sp, r2, lsl #1]
+# CHECK: ldrh.w r7, [sp, r2]
+# CHECK: ldrh r5, [r8, #255]!
+# CHECK: ldrh r2, [r5, #4]!
+# CHECK: ldrh r1, [r4, #-4]!
+# CHECK: ldrh lr, [r3], #255
+# CHECK: ldrh r9, [r2], #4
+# CHECK: ldrh r3, [sp], #-4
+
+0x38 0xf8 0x01 0x10
+0x35 0xf8 0x02 0x40
+0x30 0xf8 0x32 0x60
+0x38 0xf8 0x22 0x80
+0x3d 0xf8 0x12 0x70
+0x3d 0xf8 0x02 0x70
+0x38 0xf8 0xff 0x5f
+0x35 0xf8 0x04 0x2f
+0x34 0xf8 0x04 0x1d
+0x33 0xf8 0xff 0xeb
+0x32 0xf8 0x04 0x9b
+0x3d 0xf8 0x04 0x39
+
+
+#------------------------------------------------------------------------------
+# LDRSB(immediate)
+#------------------------------------------------------------------------------
+# CHECK: ldrsb r5, [r5, #-4]
+# CHECK: ldrsb.w r5, [r6, #32]
+# CHECK: ldrsb.w r5, [r6, #33]
+# CHECK: ldrsb.w r5, [r6, #257]
+# CHECK: ldrsb.w lr, [r7, #257]
+
+0x15 0xf9 0x04 0x5c
+0x96 0xf9 0x20 0x50
+0x96 0xf9 0x21 0x50
+0x96 0xf9 0x01 0x51
+0x97 0xf9 0x01 0xe1
+
+
+#------------------------------------------------------------------------------
+# LDRSB(register)
+#------------------------------------------------------------------------------
+# CHECK: ldrsb.w r1, [r8, r1]
+# CHECK: ldrsb.w r4, [r5, r2]
+# CHECK: ldrsb.w r6, [r0, r2, lsl #3]
+# CHECK: ldrsb.w r8, [r8, r2, lsl #2]
+# CHECK: ldrsb.w r7, [sp, r2, lsl #1]
+# CHECK: ldrsb.w r7, [sp, r2]
+# CHECK: ldrsb r5, [r8, #255]!
+# CHECK: ldrsb r2, [r5, #4]!
+# CHECK: ldrsb r1, [r4, #-4]!
+# CHECK: ldrsb lr, [r3], #255
+# CHECK: ldrsb r9, [r2], #4
+# CHECK: ldrsb r3, [sp], #-4
+
+0x18 0xf9 0x01 0x10
+0x15 0xf9 0x02 0x40
+0x10 0xf9 0x32 0x60
+0x18 0xf9 0x22 0x80
+0x1d 0xf9 0x12 0x70
+0x1d 0xf9 0x02 0x70
+0x18 0xf9 0xff 0x5f
+0x15 0xf9 0x04 0x2f
+0x14 0xf9 0x04 0x1d
+0x13 0xf9 0xff 0xeb
+0x12 0xf9 0x04 0x9b
+0x1d 0xf9 0x04 0x39
+
+
+#------------------------------------------------------------------------------
+# LDRSBT
+#------------------------------------------------------------------------------
+# CHECK: ldrsbt r1, [r2]
+# CHECK: ldrsbt r1, [r8]
+# CHECK: ldrsbt r1, [r8, #3]
+# CHECK: ldrsbt r1, [r8, #255]
+
+0x12 0xf9 0x00 0x1e
+0x18 0xf9 0x00 0x1e
+0x18 0xf9 0x03 0x1e
+0x18 0xf9 0xff 0x1e
+
+
+#------------------------------------------------------------------------------
+# LDRSH(immediate)
+#------------------------------------------------------------------------------
+# CHECK: ldrsh r5, [r5, #-4]
+# CHECK: ldrsh.w r5, [r6, #32]
+# CHECK: ldrsh.w r5, [r6, #33]
+# CHECK: ldrsh.w r5, [r6, #257]
+# CHECK: ldrsh.w lr, [r7, #257]
+
+0x35 0xf9 0x04 0x5c
+0xb6 0xf9 0x20 0x50
+0xb6 0xf9 0x21 0x50
+0xb6 0xf9 0x01 0x51
+0xb7 0xf9 0x01 0xe1
+
+
+#------------------------------------------------------------------------------
+# LDRSH(register)
+#------------------------------------------------------------------------------
+# CHECK: ldrsh.w r1, [r8, r1]
+# CHECK: ldrsh.w r4, [r5, r2]
+# CHECK: ldrsh.w r6, [r0, r2, lsl #3]
+# CHECK: ldrsh.w r8, [r8, r2, lsl #2]
+# CHECK: ldrsh.w r7, [sp, r2, lsl #1]
+# CHECK: ldrsh.w r7, [sp, r2]
+# CHECK: ldrsh r5, [r8, #255]!
+# CHECK: ldrsh r2, [r5, #4]!
+# CHECK: ldrsh r1, [r4, #-4]!
+# CHECK: ldrsh lr, [r3], #255
+# CHECK: ldrsh r9, [r2], #4
+# CHECK: ldrsh r3, [sp], #-4
+
+0x38 0xf9 0x01 0x10
+0x35 0xf9 0x02 0x40
+0x30 0xf9 0x32 0x60
+0x38 0xf9 0x22 0x80
+0x3d 0xf9 0x12 0x70
+0x3d 0xf9 0x02 0x70
+0x38 0xf9 0xff 0x5f
+0x35 0xf9 0x04 0x2f
+0x34 0xf9 0x04 0x1d
+0x33 0xf9 0xff 0xeb
+0x32 0xf9 0x04 0x9b
+0x3d 0xf9 0x04 0x39
+
+
+#------------------------------------------------------------------------------
+# LDRSHT
+#------------------------------------------------------------------------------
+# CHECK: ldrsht r1, [r2]
+# CHECK: ldrsht r1, [r8]
+# CHECK: ldrsht r1, [r8, #3]
+# CHECK: ldrsht r1, [r8, #255]
+
+0x32 0xf9 0x00 0x1e
+0x38 0xf9 0x00 0x1e
+0x38 0xf9 0x03 0x1e
+0x38 0xf9 0xff 0x1e
+
+
+#------------------------------------------------------------------------------
+# LDRT
+#------------------------------------------------------------------------------
+# CHECK: ldrt r1, [r2]
+# CHECK: ldrt r2, [r6]
+# CHECK: ldrt r3, [r7, #3]
+# CHECK: ldrt r4, [r9, #255]
+
+0x52 0xf8 0x00 0x1e
+0x56 0xf8 0x00 0x2e
+0x57 0xf8 0x03 0x3e
+0x59 0xf8 0xff 0x4e
+
+
+#------------------------------------------------------------------------------
+# LSL (immediate)
+#------------------------------------------------------------------------------
+# CHECK: lsl.w r2, r3, #12
+# CHECK: lsls.w r8, r3, #31
+# CHECK: lsls.w r2, r3, #1
+# CHECK: lsl.w r2, r3, #4
+# CHECK: lsls.w r2, r12, #15
+
+# CHECK: lsl.w r3, r3, #19
+# CHECK: lsls.w r8, r8, #2
+# CHECK: lsls.w r7, r7, #5
+# CHECK: lsl.w r12, r12, #21
+
+0x4f 0xea 0x03 0x32
+0x5f 0xea 0xc3 0x78
+0x5f 0xea 0x43 0x02
+0x4f 0xea 0x03 0x12
+0x5f 0xea 0xcc 0x32
+
+0x4f 0xea 0xc3 0x43
+0x5f 0xea 0x88 0x08
+0x5f 0xea 0x47 0x17
+0x4f 0xea 0x4c 0x5c
+
+
+#------------------------------------------------------------------------------
+# LSL (register)
+#------------------------------------------------------------------------------
+# CHECK: lsl.w r3, r4, r2
+# CHECK: lsl.w r1, r1, r2
+# CHECK: lsls.w r3, r4, r8
+
+0x04 0xfa 0x02 0xf3
+0x01 0xfa 0x02 0xf1
+0x14 0xfa 0x08 0xf3
+
+
+#------------------------------------------------------------------------------
+# LSR (immediate)
+#------------------------------------------------------------------------------
+# CHECK: lsr.w r2, r3, #12
+# CHECK: lsrs.w r8, r3, #32
+# CHECK: lsrs.w r2, r3, #1
+# CHECK: lsr.w r2, r3, #4
+# CHECK: lsrs.w r2, r12, #15
+
+# CHECK: lsr.w r3, r3, #19
+# CHECK: lsrs.w r8, r8, #2
+# CHECK: lsrs.w r7, r7, #5
+# CHECK: lsr.w r12, r12, #21
+
+0x4f 0xea 0x13 0x32
+0x5f 0xea 0x13 0x08
+0x5f 0xea 0x53 0x02
+0x4f 0xea 0x13 0x12
+0x5f 0xea 0xdc 0x32
+
+0x4f 0xea 0xd3 0x43
+0x5f 0xea 0x98 0x08
+0x5f 0xea 0x57 0x17
+0x4f 0xea 0x5c 0x5c
+
+
+#------------------------------------------------------------------------------
+# LSR (register)
+#------------------------------------------------------------------------------
+# CHECK: lsr.w r3, r4, r2
+# CHECK: lsr.w r1, r1, r2
+# CHECK: lsrs.w r3, r4, r8
+
+0x24 0xfa 0x02 0xf3
+0x21 0xfa 0x02 0xf1
+0x34 0xfa 0x08 0xf3
+
+#------------------------------------------------------------------------------
+# MCR/MCR2
+#------------------------------------------------------------------------------
+# CHECK: mcr  p7, #1, r5, c1, c1, #4
+# CHECK: mcr2  p7, #1, r5, c1, c1, #4
+
+0x21 0xee 0x91 0x57
+0x21 0xfe 0x91 0x57
+
+
+#------------------------------------------------------------------------------
+# MCRR/MCRR2
+#------------------------------------------------------------------------------
+# CHECK: mcrr  p7, #15, r5, r4, c1
+# CHECK: mcrr2  p7, #15, r5, r4, c1
+
+0x44 0xec 0xf1 0x57
+0x44 0xfc 0xf1 0x57
+
+
+#------------------------------------------------------------------------------
+# MLA/MLS
+#------------------------------------------------------------------------------
+# CHECK: mla  r1, r2, r3, r4
+# CHECK: mls  r1, r2, r3, r4
+
+0x02 0xfb 0x03 0x41
+0x02 0xfb 0x13 0x41
+
+
+#------------------------------------------------------------------------------
+# MOV(immediate)
+#------------------------------------------------------------------------------
+# CHECK: movs r1, #21
+# CHECK: movs.w r1, #21
+# CHECK: movs.w r8, #21
+# CHECK: movw r0, #65535
+# CHECK: movw r1, #43777
+# CHECK: movw r1, #43792
+# CHECK: mov.w r0, #66846720
+# CHECK: mov.w r0, #66846720
+# CHECK: movs.w r0, #66846720
+
+0x15 0x21
+0x5f 0xf0 0x15 0x01
+0x5f 0xf0 0x15 0x08
+0x4f 0xf6 0xff 0x70
+0x4a 0xf6 0x01 0x31
+0x4a 0xf6 0x10 0x31
+0x4f 0xf0 0x7f 0x70
+0x4f 0xf0 0x7f 0x70
+0x5f 0xf0 0x7f 0x70
+
+
 #------------------------------------------------------------------------------
 # IT
 #------------------------------------------------------------------------------
@@ -436,3 +944,4 @@
 0x00 0xbf
 0xf5 0x1b
 0x11 0x1d
+