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[X86] Use APInt::isSignedIntN instead of isIntN for 64-bit ANDs in X86DAGToDAGISel::IsProfitableToFold

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Pretty sure we meant to be checking signed 32 immediates here
rather than unsigned 32 bit. I suspect I messed this up because
in MathExtras.h we have isIntN and isUIntN so isIntN differs in
signedness depending on whether you're using APInt or plain integers.

This fixes a case where we didn't fold a constant created
by shrinkAndImmediate. Since shrinkAndImmediate doesn't topologically
sort constants it creates, we can fail to convert the Constant
to a TargetConstant. This leads to very strange behavior later.

Fixes PR48458.
This commit is contained in:
Craig Topper 2020-12-09 10:21:40 -08:00
parent 7f2a5362d1
commit 067e0b2781
2 changed files with 18 additions and 1 deletions
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2
lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -616,7 +616,7 @@ X86DAGToDAGISel::IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const {
// best of both worlds.
if (U->getOpcode() == ISD::AND &&
Imm->getAPIntValue().getBitWidth() == 64 &&
Imm->getAPIntValue().isIntN(32))
Imm->getAPIntValue().isSignedIntN(32))
return false;
// If this really a zext_inreg that can be represented with a movzx

17
test/CodeGen/X86/pr48458.ll Normal file
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@ -0,0 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define i1 @foo(i64* %0) {
; CHECK-LABEL: foo:
; CHECK: # %bb.0: # %top
; CHECK-NEXT: movq (%rdi), %rax
; CHECK-NEXT: andq $-2147483648, %rax # imm = 0x80000000
; CHECK-NEXT: sete %al
; CHECK-NEXT: retq
top:
%1 = load i64, i64* %0, !range !0
%2 = icmp ult i64 %1, 2147483648
ret i1 %2
}
!0 = !{i64 0, i64 10000000000}