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Clean up codes in InstCombiner::SimplifyDemandedBits():
1. Line out nested call of APInt::zext/trunc. 2. Make more use of APInt::getHighBitsSet/getLowBitsSet. 3. Use APInt[] operator instead of expression like "APIntVal & SignBit". llvm-svn: 35444
This commit is contained in:
Zhou Sheng
parent
74db84591c
commit
067efd7806
@ -1106,8 +1106,11 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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case Instruction::Trunc: {
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uint32_t truncBf =
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cast<IntegerType>(I->getOperand(0)->getType())->getBitWidth();
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if (SimplifyDemandedBits(I->getOperand(0), DemandedMask.zext(truncBf),
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RHSKnownZero.zext(truncBf), RHSKnownOne.zext(truncBf), Depth+1))
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DemandedMask.zext(truncBf);
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RHSKnownZero.zext(truncBf);
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RHSKnownOne.zext(truncBf);
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if (SimplifyDemandedBits(I->getOperand(0), DemandedMask,
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RHSKnownZero, RHSKnownOne, Depth+1))
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return true;
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DemandedMask.trunc(BitWidth);
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RHSKnownZero.trunc(BitWidth);
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@ -1130,12 +1133,14 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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// Compute the bits in the result that are not present in the input.
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const IntegerType *SrcTy = cast<IntegerType>(I->getOperand(0)->getType());
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uint32_t SrcBitWidth = SrcTy->getBitWidth();
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APInt NewBits(APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth));
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DemandedMask &= SrcTy->getMask().zext(BitWidth);
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uint32_t zextBf = SrcTy->getBitWidth();
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if (SimplifyDemandedBits(I->getOperand(0), DemandedMask.trunc(zextBf),
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RHSKnownZero.trunc(zextBf), RHSKnownOne.trunc(zextBf), Depth+1))
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DemandedMask.trunc(zextBf);
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RHSKnownZero.trunc(zextBf);
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RHSKnownOne.trunc(zextBf);
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if (SimplifyDemandedBits(I->getOperand(0), DemandedMask,
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RHSKnownZero, RHSKnownOne, Depth+1))
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return true;
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DemandedMask.zext(BitWidth);
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RHSKnownZero.zext(BitWidth);
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@ -1143,29 +1148,32 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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assert((RHSKnownZero & RHSKnownOne) == 0 &&
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"Bits known to be one AND zero?");
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// The top bits are known to be zero.
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RHSKnownZero |= NewBits;
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RHSKnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth);
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break;
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}
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case Instruction::SExt: {
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// Compute the bits in the result that are not present in the input.
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const IntegerType *SrcTy = cast<IntegerType>(I->getOperand(0)->getType());
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uint32_t SrcBitWidth = SrcTy->getBitWidth();
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APInt NewBits(APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth));
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// Get the sign bit for the source type
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APInt InSignBit(APInt::getSignBit(SrcTy->getPrimitiveSizeInBits()));
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APInt InSignBit(APInt::getSignBit(SrcBitWidth));
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InSignBit.zext(BitWidth);
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APInt InputDemandedBits = DemandedMask &
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SrcTy->getMask().zext(BitWidth);
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APInt::getLowBitsSet(BitWidth, SrcBitWidth);
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APInt NewBits(APInt::getHighBitsSet(BitWidth, BitWidth - SrcBitWidth));
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// If any of the sign extended bits are demanded, we know that the sign
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// bit is demanded.
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if ((NewBits & DemandedMask) != 0)
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InputDemandedBits |= InSignBit;
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uint32_t sextBf = SrcTy->getBitWidth();
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if (SimplifyDemandedBits(I->getOperand(0), InputDemandedBits.trunc(sextBf),
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RHSKnownZero.trunc(sextBf), RHSKnownOne.trunc(sextBf), Depth+1))
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InputDemandedBits.trunc(sextBf);
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RHSKnownZero.trunc(sextBf);
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RHSKnownOne.trunc(sextBf);
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if (SimplifyDemandedBits(I->getOperand(0), InputDemandedBits,
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RHSKnownZero, RHSKnownOne, Depth+1))
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return true;
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InputDemandedBits.zext(BitWidth);
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RHSKnownZero.zext(BitWidth);
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@ -1178,12 +1186,12 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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// If the input sign bit is known zero, or if the NewBits are not demanded
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// convert this into a zero extension.
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if ((RHSKnownZero & InSignBit) != 0 || (NewBits & ~DemandedMask) == NewBits)
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if (RHSKnownZero[SrcBitWidth-1] || (NewBits & ~DemandedMask) == NewBits)
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{
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// Convert to ZExt cast
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CastInst *NewCast = new ZExtInst(I->getOperand(0), VTy, I->getName(), I);
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return UpdateValueUsesWith(I, NewCast);
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} else if ((RHSKnownOne & InSignBit) != 0) { // Input sign bit known set
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} else if (RHSKnownOne[SrcBitWidth-1]) { // Input sign bit known set
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RHSKnownOne |= NewBits;
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RHSKnownZero &= ~NewBits;
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} else { // Input sign bit unknown
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@ -1208,7 +1216,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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// If the top bit of the output is demanded, demand everything from the
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// input. Otherwise, we demand all the input bits except NLZ top bits.
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APInt InDemandedBits(APInt::getAllOnesValue(BitWidth).lshr(NLZ));
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APInt InDemandedBits(APInt::getLowBitsSet(BitWidth, BitWidth - NLZ));
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// Find information about known zero/one bits in the input.
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if (SimplifyDemandedBits(I->getOperand(0), InDemandedBits,
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@ -1272,10 +1280,10 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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} else {
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// If the high-bits of this ADD are not demanded, then it does not demand
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// the high bits of its LHS or RHS.
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if ((DemandedMask & APInt::getSignBit(BitWidth)) == 0) {
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if (DemandedMask[BitWidth-1] == 0) {
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// Right fill the mask of bits for this ADD to demand the most
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// significant bit and all those below it.
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APInt DemandedFromOps = APInt::getAllOnesValue(BitWidth).lshr(NLZ);
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APInt DemandedFromOps(APInt::getLowBitsSet(BitWidth, BitWidth-NLZ));
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if (SimplifyDemandedBits(I->getOperand(0), DemandedFromOps,
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LHSKnownZero, LHSKnownOne, Depth+1))
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return true;
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@ -1289,11 +1297,11 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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case Instruction::Sub:
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// If the high-bits of this SUB are not demanded, then it does not demand
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// the high bits of its LHS or RHS.
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if ((DemandedMask & APInt::getSignBit(BitWidth)) == 0) {
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if (DemandedMask[BitWidth-1] == 0) {
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// Right fill the mask of bits for this SUB to demand the most
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// significant bit and all those below it.
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unsigned NLZ = DemandedMask.countLeadingZeros();
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APInt DemandedFromOps(APInt::getAllOnesValue(BitWidth).lshr(NLZ));
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APInt DemandedFromOps(APInt::getLowBitsSet(BitWidth, BitWidth-NLZ));
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if (SimplifyDemandedBits(I->getOperand(0), DemandedFromOps,
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LHSKnownZero, LHSKnownOne, Depth+1))
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return true;
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@ -1305,7 +1313,8 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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case Instruction::Shl:
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if (ConstantInt *SA = dyn_cast<ConstantInt>(I->getOperand(1))) {
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uint64_t ShiftAmt = SA->getZExtValue();
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if (SimplifyDemandedBits(I->getOperand(0), DemandedMask.lshr(ShiftAmt),
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APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt));
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if (SimplifyDemandedBits(I->getOperand(0), DemandedMaskIn,
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RHSKnownZero, RHSKnownOne, Depth+1))
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return true;
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assert((RHSKnownZero & RHSKnownOne) == 0 &&
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@ -1322,22 +1331,18 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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if (ConstantInt *SA = dyn_cast<ConstantInt>(I->getOperand(1))) {
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unsigned ShiftAmt = SA->getZExtValue();
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APInt TypeMask(APInt::getAllOnesValue(BitWidth));
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// Unsigned shift right.
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if (SimplifyDemandedBits(I->getOperand(0),
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(DemandedMask.shl(ShiftAmt)) & TypeMask,
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APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt));
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if (SimplifyDemandedBits(I->getOperand(0), DemandedMaskIn,
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RHSKnownZero, RHSKnownOne, Depth+1))
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return true;
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assert((RHSKnownZero & RHSKnownOne) == 0 &&
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"Bits known to be one AND zero?");
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RHSKnownZero &= TypeMask;
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RHSKnownOne &= TypeMask;
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RHSKnownZero = APIntOps::lshr(RHSKnownZero, ShiftAmt);
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RHSKnownOne = APIntOps::lshr(RHSKnownOne, ShiftAmt);
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if (ShiftAmt) {
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// Compute the new bits that are at the top now.
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APInt HighBits(APInt::getAllOnesValue(BitWidth).shl(
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BitWidth - ShiftAmt));
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APInt HighBits(APInt::getHighBitsSet(BitWidth, ShiftAmt));
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RHSKnownZero |= HighBits; // high bits known zero.
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}
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}
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@ -1358,18 +1363,16 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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if (ConstantInt *SA = dyn_cast<ConstantInt>(I->getOperand(1))) {
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unsigned ShiftAmt = SA->getZExtValue();
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APInt TypeMask(APInt::getAllOnesValue(BitWidth));
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// Signed shift right.
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APInt DemandedMaskIn(DemandedMask.shl(ShiftAmt));
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if (SimplifyDemandedBits(I->getOperand(0),
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(DemandedMask.shl(ShiftAmt)) & TypeMask,
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DemandedMaskIn,
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RHSKnownZero, RHSKnownOne, Depth+1))
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return true;
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assert((RHSKnownZero & RHSKnownOne) == 0 &&
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"Bits known to be one AND zero?");
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// Compute the new bits that are at the top now.
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APInt HighBits(APInt::getAllOnesValue(BitWidth).shl(BitWidth - ShiftAmt));
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RHSKnownZero &= TypeMask;
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RHSKnownOne &= TypeMask;
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APInt HighBits(APInt::getHighBitsSet(BitWidth, ShiftAmt));
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RHSKnownZero = APIntOps::lshr(RHSKnownZero, ShiftAmt);
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RHSKnownOne = APIntOps::lshr(RHSKnownOne, ShiftAmt);
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@ -1380,7 +1383,7 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, APInt DemandedMask,
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// If the input sign bit is known to be zero, or if none of the top bits
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// are demanded, turn this into an unsigned shift right.
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if ((RHSKnownZero & SignBit) != 0 ||
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if (RHSKnownZero[BitWidth-ShiftAmt-1] ||
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(HighBits & ~DemandedMask) == HighBits) {
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// Perform the logical shift right.
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Value *NewVal = BinaryOperator::createLShr(
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