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AMDGPU: Don't reinvent transferSuccessorsAndUpdatePHIs
llvm-svn: 276434
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9663fe04b9
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@ -1072,24 +1072,6 @@ unsigned SITargetLowering::getRegisterByName(const char* RegName, EVT VT,
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+ StringRef(RegName) + "\"."));
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}
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static void replaceSuccessorPhisWith(MachineBasicBlock &BB,
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MachineBasicBlock &SplitBB) {
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for (MachineBasicBlock *Succ : BB.successors()) {
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for (MachineInstr &MI : *Succ) {
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if (!MI.isPHI())
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break;
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for (unsigned I = 2, E = MI.getNumOperands(); I != E; I += 2) {
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MachineOperand &FromBB = MI.getOperand(I);
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if (&BB == FromBB.getMBB()) {
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FromBB.setMBB(&SplitBB);
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break;
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}
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}
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}
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}
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}
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// If kill is not the last instruction, split the block so kill is always a
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// proper terminator.
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MachineBasicBlock *SITargetLowering::splitKillBlock(MachineInstr &MI,
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@ -1109,14 +1091,10 @@ MachineBasicBlock *SITargetLowering::splitKillBlock(MachineInstr &MI,
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MachineBasicBlock *SplitBB
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= MF->CreateMachineBasicBlock(BB->getBasicBlock());
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// Fix the block phi references to point to the new block for the defs in the
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// second piece of the block.
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replaceSuccessorPhisWith(*BB, *SplitBB);
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MF->insert(++MachineFunction::iterator(BB), SplitBB);
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SplitBB->splice(SplitBB->begin(), BB, SplitPoint, BB->end());
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SplitBB->transferSuccessors(BB);
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SplitBB->transferSuccessorsAndUpdatePHIs(BB);
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BB->addSuccessor(SplitBB);
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MI.setDesc(TII->get(AMDGPU::SI_KILL_TERMINATOR));
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@ -1237,13 +1215,11 @@ static MachineBasicBlock *loadM0FromVGPR(const SIInstrInfo *TII,
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MF->insert(MBBI, LoopBB);
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MF->insert(MBBI, RemainderBB);
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replaceSuccessorPhisWith(MBB, *RemainderBB);
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LoopBB->addSuccessor(LoopBB);
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LoopBB->addSuccessor(RemainderBB);
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// Move the rest of the block into a new block.
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RemainderBB->transferSuccessors(&MBB);
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RemainderBB->transferSuccessorsAndUpdatePHIs(&MBB);
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RemainderBB->splice(RemainderBB->begin(), &MBB, I, MBB.end());
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MBB.addSuccessor(LoopBB);
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