mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-23 13:02:52 +02:00
[X86] Give VLDDQUrm and LDDQUrm the same itinerary.
llvm-svn: 328292
This commit is contained in:
parent
8209f6b822
commit
0752ce7411
@ -4834,11 +4834,12 @@ let SchedRW = [WriteVecLoad] in {
|
||||
let Predicates = [HasAVX] in {
|
||||
def VLDDQUrm : S3DI<0xF0, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
|
||||
"vlddqu\t{$src, $dst|$dst, $src}",
|
||||
[(set VR128:$dst, (int_x86_sse3_ldu_dq addr:$src))]>, VEX, VEX_WIG;
|
||||
[(set VR128:$dst, (int_x86_sse3_ldu_dq addr:$src))],
|
||||
IIC_SSE_LDDQU>, VEX, VEX_WIG;
|
||||
def VLDDQUYrm : S3DI<0xF0, MRMSrcMem, (outs VR256:$dst), (ins i256mem:$src),
|
||||
"vlddqu\t{$src, $dst|$dst, $src}",
|
||||
[(set VR256:$dst, (int_x86_avx_ldu_dq_256 addr:$src))]>,
|
||||
VEX, VEX_L, VEX_WIG;
|
||||
[(set VR256:$dst, (int_x86_avx_ldu_dq_256 addr:$src))],
|
||||
IIC_SSE_LDDQU>, VEX, VEX_L, VEX_WIG;
|
||||
} // Predicates
|
||||
def LDDQUrm : S3DI<0xF0, MRMSrcMem, (outs VR128:$dst), (ins i128mem:$src),
|
||||
"lddqu\t{$src, $dst|$dst, $src}",
|
||||
|
Loading…
Reference in New Issue
Block a user