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MIRTests: Remove unnecessary 2>&1 redirection

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llc mir output goes to stdout nowadays, so the 2>&1 is not necessary
anymore for most tests.

llvm-svn: 295859
This commit is contained in:
Matthias Braun 2017-02-22 18:47:41 +00:00
parent 8cea2a9fb5
commit 075724a5d9
69 changed files with 69 additions and 69 deletions
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2
test/CodeGen/AArch64/GlobalISel/legalize-add.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-and.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-combines.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-div.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-ext.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-fcmp.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-fptoi.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-gep.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-inserts.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-load-store.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-or.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-simple.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-vaarg.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=legalizer -global-isel %s -o - | FileCheck %s
--- |
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"

2
test/CodeGen/AArch64/arm64-regress-opt-cmp.mir
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@ -1,4 +1,4 @@
# RUN: llc -mtriple=aarch64-linux-gnu -run-pass peephole-opt -o - %s 2>&1 | FileCheck %s
# RUN: llc -mtriple=aarch64-linux-gnu -run-pass peephole-opt -o - %s | FileCheck %s
# CHECK: %1 = ANDWri {{.*}}
# CHECK-NEXT: %wzr = SUBSWri {{.*}}
--- |

2
test/CodeGen/AArch64/ldst-opt.mir
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@ -1,4 +1,4 @@
# RUN: llc -mtriple=aarch64--linux-gnu -run-pass=aarch64-ldst-opt %s -verify-machineinstrs -o - 2>&1 | FileCheck %s
# RUN: llc -mtriple=aarch64--linux-gnu -run-pass=aarch64-ldst-opt %s -verify-machineinstrs -o - | FileCheck %s
---
name: promote-load-from-store
tracksRegLiveness: true

2
test/CodeGen/AArch64/movimm-wzr.mir
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@ -1,4 +1,4 @@
# RUN: llc -run-pass=aarch64-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -run-pass=aarch64-expand-pseudo %s -o - | FileCheck %s
--- |
; ModuleID = 'simple.ll'

2
test/CodeGen/AVR/pseudo/ADCWRdRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit add with carry pseudo instruction.

2
test/CodeGen/AVR/pseudo/ADDWRdRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit add pseudo instruction.

2
test/CodeGen/AVR/pseudo/ANDIWRdK.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit ANDO pseudo instruction.

2
test/CodeGen/AVR/pseudo/ANDWRdRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit AND pseudo instruction.

2
test/CodeGen/AVR/pseudo/ASRWRd.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
--- |
target triple = "avr--"

2
test/CodeGen/AVR/pseudo/COMWRd.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit COM pseudo instruction.

2
test/CodeGen/AVR/pseudo/CPCWRdRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit CPCW pseudo instruction.

2
test/CodeGen/AVR/pseudo/CPWRdRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit CPW pseudo instruction.

2
test/CodeGen/AVR/pseudo/EORWRdRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit EOR pseudo instruction.

2
test/CodeGen/AVR/pseudo/FRMIDX.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# TODO: Write this test.
# This instruction isn't expanded by the pseudo expansion passs, but

2
test/CodeGen/AVR/pseudo/INWRdA.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
--- |
target triple = "avr--"

2
test/CodeGen/AVR/pseudo/LDDWRdPtrQ.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 %s -o - 2>&1 -march=avr | FileCheck %s
# RUN: llc -O0 %s -o - -march=avr | FileCheck %s
# This test checks the expansion of the 16-bit 'LDDWRdPtrQ' pseudo instruction.

2
test/CodeGen/AVR/pseudo/LDDWRdYQ.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 %s -o - 2>&1 -march=avr | FileCheck %s
# RUN: llc -O0 %s -o - -march=avr | FileCheck %s
# This test checks the expansion of the 16-bit 'LDDWRdYQ instruction

2
test/CodeGen/AVR/pseudo/LDIWRdK.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit LDIWRdK pseudo instruction.

2
test/CodeGen/AVR/pseudo/LDSWRdK.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit LDSWRdK pseudo instruction.

2
test/CodeGen/AVR/pseudo/LDWRdPtr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit LDWRdPtr pseudo instruction.

2
test/CodeGen/AVR/pseudo/LDWRdPtrPd.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit LDWRdPtrPd pseudo instruction.

2
test/CodeGen/AVR/pseudo/LDWRdPtrPi.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit LDWRdPtrPi pseudo instruction.

2
test/CodeGen/AVR/pseudo/LSLWRd.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
--- |
target triple = "avr--"

2
test/CodeGen/AVR/pseudo/LSRWRd.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
--- |
target triple = "avr--"

2
test/CodeGen/AVR/pseudo/ORIWRdK.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit OR pseudo instruction.

2
test/CodeGen/AVR/pseudo/ORWRdRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit OR pseudo instruction.

2
test/CodeGen/AVR/pseudo/OUTWARr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
--- |
target triple = "avr--"

2
test/CodeGen/AVR/pseudo/POPWRd.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
--- |
target triple = "avr--"

2
test/CodeGen/AVR/pseudo/PUSHWRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
--- |
target triple = "avr--"

2
test/CodeGen/AVR/pseudo/SBCIWRdK.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit subtraction with carry pseudo instruction.

2
test/CodeGen/AVR/pseudo/SBCWRdRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit subtraction with carry pseudo instruction.

2
test/CodeGen/AVR/pseudo/SEXT.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
--- |
target triple = "avr--"

2
test/CodeGen/AVR/pseudo/STDWPtrQRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
--- |
target triple = "avr--"

2
test/CodeGen/AVR/pseudo/STSWKRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit STSWRdK pseudo instruction.

2
test/CodeGen/AVR/pseudo/STWPtrPdRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
--- |
target triple = "avr--"

2
test/CodeGen/AVR/pseudo/STWPtrPiRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
--- |
target triple = "avr--"

2
test/CodeGen/AVR/pseudo/STWPtrRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit STSWRdK pseudo instruction.

2
test/CodeGen/AVR/pseudo/SUBIWRdK.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit subtraction pseudo instruction.

2
test/CodeGen/AVR/pseudo/SUBWRdRr.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
# This test checks the expansion of the 16-bit subtraction pseudo instruction.

2
test/CodeGen/AVR/pseudo/ZEXT.mir
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@ -1,4 +1,4 @@
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-expand-pseudo %s -o - | FileCheck %s
--- |
target triple = "avr--"

2
test/CodeGen/AVR/pseudo/expand-lddw-dst-src-same.mir
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# RUN: llc -O0 %s -o - 2>&1 -march=avr | FileCheck %s
# RUN: llc -O0 %s -o - -march=avr | FileCheck %s
# This test ensures that the pseudo expander can correctly handle the case
# where we are expanding a 16-bit LDD instruction where the source and

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test/CodeGen/AVR/relax-mem/STDWPtrQRr.mir
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# RUN: llc -O0 -run-pass=avr-relax-mem %s -o - 2>&1 | FileCheck %s
# RUN: llc -O0 -run-pass=avr-relax-mem %s -o - | FileCheck %s
--- |
target triple = "avr--"

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test/CodeGen/Hexagon/expand-condsets-rm-reg.mir
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# RUN: llc -march=hexagon -run-pass expand-condsets -o - 2>&1 %s -verify-machineinstrs -debug-only=expand-condsets | FileCheck %s
# RUN: llc -march=hexagon -run-pass expand-condsets -o - %s -verify-machineinstrs -debug-only=expand-condsets | FileCheck %s
# REQUIRES: asserts
# Check that coalesced registers are removed from live intervals.

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test/CodeGen/MIR/Generic/llvmIRMissing.mir
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# RUN: llc -run-pass none -o - %s 2>&1 | FileCheck %s
# RUN: llc -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser accepts files without the LLVM IR.
---

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test/CodeGen/MIR/Generic/machine-basic-block-ir-block-reference.mir
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# RUN: llc -run-pass none -o - %s 2>&1 | FileCheck %s
# RUN: llc -run-pass none -o - %s | FileCheck %s
# This test ensures that the MIR parser preserves unnamed LLVM IR block
# references.

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test/CodeGen/MIR/Generic/runPass.mir
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# RUN: llc -run-pass=greedy -debug-pass=Arguments -o - %s 2>&1 | FileCheck %s
# RUN: llc -run-pass=greedy -debug-pass=Arguments -o - %s | FileCheck %s
# Check that passes are initialized correctly, so that it's possible to
# use -run-pass.

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test/CodeGen/MIR/X86/expected-named-register-in-allocation-hint.mir
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# RUN: llc -march=x86-64 -run-pass none -o - %s 2>&1 | FileCheck %s
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
--- |

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test/CodeGen/X86/implicit-use-spill.mir
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# RUN: llc -run-pass=greedy -mtriple=x86_64-apple-macosx -o - %s 2>&1 | FileCheck %s
# RUN: llc -run-pass=greedy -mtriple=x86_64-apple-macosx -o - %s | FileCheck %s
# Make sure we don't assert when we try to reload a value that is just implicitly used.
---