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Use a spilled free callee-saved register as scratch register.
llvm-svn: 34785
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@ -313,6 +313,7 @@ ARMRegisterInfo::getCalleeSavedRegClasses() const {
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}
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BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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// FIXME: avoid re-calculating this everytime.
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BitVector Reserved(getNumRegs());
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Reserved.set(ARM::SP);
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Reserved.set(ARM::PC);
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@ -619,6 +620,20 @@ static void emitThumbConstant(MachineBasicBlock &MBB,
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.addReg(DestReg, false, false, true);
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}
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/// findScratchRegister - Find a 'free' ARM register. If register scavenger
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/// is not being used, R12 is available. Otherwise, try for a call-clobbered
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/// register first and then a spilled callee-saved register if that fails.
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static
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unsigned findScratchRegister(RegScavenger *RS, const TargetRegisterClass *RC,
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ARMFunctionInfo *AFI) {
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unsigned Reg = RS ? RS->FindUnusedReg(RC, true) : (unsigned) ARM::R12;
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if (Reg == 0)
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// Try a already spilled CS register.
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Reg = RS->FindUnusedReg(RC, AFI->getSpilledCSRegisters());
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return Reg;
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}
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void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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RegScavenger *RS) const{
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unsigned i = 0;
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@ -902,9 +917,8 @@ void ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
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// If the offset we have is too large to fit into the instruction, we need
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// to form it with a series of ADDri's. Do this by taking 8-bit chunks
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// out of 'Offset'.
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unsigned ScratchReg = RS
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? RS->FindUnusedReg(&ARM::GPRRegClass, true) : (unsigned)ARM::R12;
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assert(ScratchReg != 0 && "Unable to find a free call-clobbered register!");
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unsigned ScratchReg = findScratchRegister(RS, &ARM::GPRRegClass, AFI);
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assert(ScratchReg && "Unable to find a free register!");
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emitARMRegPlusImmediate(MBB, II, ScratchReg, FrameReg,
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isSub ? -Offset : Offset, TII);
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MI.getOperand(i).ChangeToRegister(ScratchReg, false, false, true);
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