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ARM: be conservative when asked load/store alignment of weird type.

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Chances are we'll be asked again after type legalization, but before that point
it's better to claim misaligned accesses aren't allowed than to assert.

llvm-svn: 332840
This commit is contained in:
Tim Northover 2018-05-21 12:43:54 +00:00
parent ebee76c11b
commit 080f8761dc
2 changed files with 12 additions and 0 deletions
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4
lib/Target/ARM/ARMISelLowering.cpp
View File

@ -12825,6 +12825,10 @@ bool ARMTargetLowering::allowsMisalignedMemoryAccesses(EVT VT,
unsigned,
unsigned,
bool *Fast) const {
// Depends what it gets converted into if the type is weird.
if (!VT.isSimple())
return false;
// The AllowsUnaliged flag models the SCTLR.A setting in ARM cpus
bool AllowsUnaligned = Subtarget->allowsUnalignedMem();

8
test/CodeGen/ARM/unaligned_load_store_vector.ll
View File

@ -485,3 +485,11 @@ entry:
ret void
}
define void @test_weird_type(<3 x double> %in, <3 x i64>* %ptr) {
; CHECK-LABEL: test_weird_type:
; CHECK: vst1
%vec.int = bitcast <3 x double> %in to <3 x i64>
store <3 x i64> %vec.int, <3 x i64>* %ptr, align 8
ret void
}