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Revert "[Debugify] Support checking Machine IR debug info"
This reverts commit 50aaa8c274910d78d7bf6c929a34fe58b1f45579.
This commit is contained in:
Xiang1 Zhang
parent
2ca38c8914
commit
085e55a045
@ -342,8 +342,8 @@ A variant of the ``debugify`` utility described in
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:ref:`Mutation testing for IR-level transformations<IRDebugify>` can be used
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for MIR-level transformations as well: much like the IR-level pass,
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``mir-debugify`` inserts sequentially increasing line locations to each
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``MachineInstr`` in a ``Module``. And the MIR-level ``mir-check-debugify`` is
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similar to IR-level ``check-debugify`` pass.
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``MachineInstr`` in a ``Module`` (although there is no equivalent MIR-level
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``check-debugify`` pass).
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For example, here is a snippet before:
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@ -403,32 +403,16 @@ and ``-start-after``. For example:
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$ llc -debugify-and-strip-all-safe -run-pass=... <other llc args>
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$ llc -debugify-and-strip-all-safe -O1 <other llc args>
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If you want to check it after each pass in a pipeline, use
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``-debugify-check-and-strip-all-safe``. This can also be combined with
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``-start-before`` and ``-start-after``. For example:
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.. code-block:: bash
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$ llc -debugify-check-and-strip-all-safe -run-pass=... <other llc args>
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$ llc -debugify-check-and-strip-all-safe -O1 <other llc args>
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To check all debug info from a test, use ``mir-check-debugify``, like:
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.. code-block:: bash
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$ llc -run-pass=mir-debugify,other-pass,mir-check-debugify
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To strip out all debug info from a test, use ``mir-strip-debug``, like:
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.. code-block:: bash
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$ llc -run-pass=mir-debugify,other-pass,mir-strip-debug
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It can be useful to combine ``mir-debugify``, ``mir-check-debugify`` and/or
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``mir-strip-debug`` to identify backend transformations which break in
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the presence of debug info. For example, to run the AArch64 backend tests
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with all normal passes "sandwiched" in between MIRDebugify and
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MIRStripDebugify mutation passes, run:
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It can be useful to combine ``mir-debugify`` and ``mir-strip-debug`` to
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identify backend transformations which break in the presence of debug info.
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For example, to run the AArch64 backend tests with all normal passes
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"sandwiched" in between MIRDebugify and MIRStripDebugify mutation passes, run:
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.. code-block:: bash
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@ -482,9 +482,6 @@ namespace llvm {
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/// info was generated by another source such as clang.
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ModulePass *createStripDebugMachineModulePass(bool OnlyDebugified);
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/// Creates MIR Check Debug pass. \see MachineCheckDebugify.cpp
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ModulePass *createCheckDebugMachineModulePass();
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/// The pass fixups statepoint machine instruction to replace usage of
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/// caller saved registers with stack slots.
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extern char &FixupStatepointCallerSavedID;
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@ -313,9 +313,6 @@ public:
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/// Add a pass to remove debug info from the MIR.
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void addStripDebugPass();
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/// Add a pass to check synthesized debug info for MIR.
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void addCheckDebugPass();
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/// Add standard passes before a pass that's about to be added. For example,
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/// the DebugifyMachineModulePass if it is enabled.
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void addMachinePrePasses(bool AllowDebugify = true);
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@ -112,7 +112,6 @@ void initializeCallGraphViewerPass(PassRegistry&);
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void initializeCallGraphWrapperPassPass(PassRegistry&);
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void initializeCallSiteSplittingLegacyPassPass(PassRegistry&);
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void initializeCalledValuePropagationLegacyPassPass(PassRegistry &);
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void initializeCheckDebugMachineModulePass(PassRegistry &);
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void initializeCodeGenPreparePass(PassRegistry&);
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void initializeConstantHoistingLegacyPassPass(PassRegistry&);
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void initializeConstantMergeLegacyPassPass(PassRegistry&);
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@ -74,7 +74,6 @@ add_llvm_component_library(LLVMCodeGen
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MachineCombiner.cpp
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MachineCopyPropagation.cpp
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MachineCSE.cpp
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MachineCheckDebugify.cpp
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MachineDebugify.cpp
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MachineDominanceFrontier.cpp
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MachineDominators.cpp
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@ -25,7 +25,6 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
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initializeBranchRelaxationPass(Registry);
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initializeCFGuardLongjmpPass(Registry);
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initializeCFIInstrInserterPass(Registry);
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initializeCheckDebugMachineModulePass(Registry);
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initializeCodeGenPreparePass(Registry);
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initializeDeadMachineInstructionElimPass(Registry);
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initializeDebugifyMachineModulePass(Registry);
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@ -1,126 +0,0 @@
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//===- MachineCheckDebugify.cpp - Check debug info ------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file This checks debug info after mir-debugify (+ pass-to-test). Currently
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/// it simply checks the integrity of line info in DILocation and
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/// DILocalVariable which mir-debugifiy generated before.
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/IR/DebugInfo.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Transforms/Utils/Debugify.h"
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#define DEBUG_TYPE "mir-check-debugify"
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using namespace llvm;
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namespace {
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struct CheckDebugMachineModule : public ModulePass {
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bool runOnModule(Module &M) override {
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MachineModuleInfo &MMI =
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getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
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NamedMDNode *NMD = M.getNamedMetadata("llvm.mir.debugify");
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if (!NMD) {
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errs() << "WARNING: Please run mir-debugify to generate "
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"llvm.mir.debugify metadata first.\n";
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return false;
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}
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auto getDebugifyOperand = [&](unsigned Idx) -> unsigned {
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return mdconst::extract<ConstantInt>(NMD->getOperand(Idx)->getOperand(0))
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->getZExtValue();
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};
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assert(NMD->getNumOperands() == 2 &&
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"llvm.mir.debugify should have exactly 2 operands!");
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unsigned NumLines = getDebugifyOperand(0);
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unsigned NumVars = getDebugifyOperand(1);
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BitVector MissingLines{NumLines, true};
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BitVector MissingVars{NumVars, true};
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for (Function &F : M.functions()) {
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MachineFunction *MF = MMI.getMachineFunction(F);
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if (!MF)
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continue;
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for (MachineBasicBlock &MBB : *MF) {
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// Find missing lines.
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// TODO: Avoid meta instructions other than dbg_val.
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for (MachineInstr &MI : MBB) {
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if (MI.isDebugValue())
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continue;
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const DebugLoc DL = MI.getDebugLoc();
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if (DL && DL.getLine() != 0) {
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MissingLines.reset(DL.getLine() - 1);
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continue;
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}
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if (!DL) {
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errs() << "WARNING: Instruction with empty DebugLoc in function ";
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errs() << F.getName() << " --";
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MI.print(errs());
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}
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}
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// Find missing variables.
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// TODO: Handle DBG_INSTR_REF which is under an experimental option now.
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for (MachineInstr &MI : MBB) {
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if (!MI.isDebugValue())
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continue;
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const DILocalVariable *LocalVar = MI.getDebugVariable();
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unsigned Var = ~0U;
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(void)to_integer(LocalVar->getName(), Var, 10);
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assert(Var <= NumVars && "Unexpected name for DILocalVariable");
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MissingVars.reset(Var - 1);
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}
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}
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}
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bool Fail = false;
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for (unsigned Idx : MissingLines.set_bits()) {
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errs() << "WARNING: Missing line " << Idx + 1 << "\n";
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Fail = true;
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}
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for (unsigned Idx : MissingVars.set_bits()) {
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errs() << "WARNING: Missing variable " << Idx + 1 << "\n";
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Fail = true;
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}
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errs() << "Machine IR debug info check: ";
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errs() << (Fail ? "FAIL" : "PASS") << "\n";
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return false;
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}
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CheckDebugMachineModule() : ModulePass(ID) {}
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void getAnalysisUsage(AnalysisUsage &AU) const override {
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AU.addRequired<MachineModuleInfoWrapperPass>();
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AU.addPreserved<MachineModuleInfoWrapperPass>();
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AU.setPreservesCFG();
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}
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static char ID; // Pass identification.
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};
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char CheckDebugMachineModule::ID = 0;
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} // end anonymous namespace
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INITIALIZE_PASS_BEGIN(CheckDebugMachineModule, DEBUG_TYPE,
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"Machine Check Debug Module", false, false)
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INITIALIZE_PASS_END(CheckDebugMachineModule, DEBUG_TYPE,
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"Machine Check Debug Module", false, false)
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ModulePass *llvm::createCheckDebugMachineModulePass() {
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return new CheckDebugMachineModule();
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}
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@ -14,7 +14,6 @@
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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@ -90,11 +89,10 @@ bool applyDebugifyMetadataToMachineFunction(MachineModuleInfo &MMI,
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// Do this by introducing debug uses of each register definition. If that is
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// not possible (e.g. we have a phi or a meta instruction), emit a constant.
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uint64_t NextImm = 0;
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SmallSet<DILocalVariable *, 16> VarSet;
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const MCInstrDesc &DbgValDesc = TII.get(TargetOpcode::DBG_VALUE);
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for (MachineBasicBlock &MBB : MF) {
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MachineBasicBlock::iterator FirstNonPHIIt = MBB.getFirstNonPHI();
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for (auto I = MBB.begin(), E = MBB.end(); I != E;) {
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for (auto I = MBB.begin(), E = MBB.end(); I != E; ) {
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MachineInstr &MI = *I;
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++I;
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@ -115,7 +113,6 @@ bool applyDebugifyMetadataToMachineFunction(MachineModuleInfo &MMI,
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Line = EarliestDVI->getDebugLoc().getLine();
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DILocalVariable *LocalVar = Line2Var[Line];
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assert(LocalVar && "No variable for current line?");
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VarSet.insert(LocalVar);
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// Emit DBG_VALUEs for register definitions.
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SmallVector<MachineOperand *, 4> RegDefs;
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@ -135,33 +132,6 @@ bool applyDebugifyMetadataToMachineFunction(MachineModuleInfo &MMI,
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}
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}
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// Here we save the number of lines and variables into "llvm.mir.debugify".
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// It is useful for mir-check-debugify.
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NamedMDNode *NMD = M.getNamedMetadata("llvm.mir.debugify");
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IntegerType *Int32Ty = Type::getInt32Ty(Ctx);
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if (!NMD) {
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NMD = M.getOrInsertNamedMetadata("llvm.mir.debugify");
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auto addDebugifyOperand = [&](unsigned N) {
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NMD->addOperand(MDNode::get(
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Ctx, ValueAsMetadata::getConstant(ConstantInt::get(Int32Ty, N))));
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};
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// Add number of lines.
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addDebugifyOperand(NextLine - 1);
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// Add number of variables.
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addDebugifyOperand(VarSet.size());
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} else {
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assert(NMD->getNumOperands() == 2 &&
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"llvm.mir.debugify should have exactly 2 operands!");
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auto setDebugifyOperand = [&](unsigned Idx, unsigned N) {
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NMD->setOperand(Idx, MDNode::get(Ctx, ValueAsMetadata::getConstant(
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ConstantInt::get(Int32Ty, N))));
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};
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// Set number of lines.
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setDebugifyOperand(0, NextLine - 1);
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// Set number of variables.
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setDebugifyOperand(1, VarSet.size());
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}
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return true;
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}
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@ -120,12 +120,6 @@ static cl::opt<cl::boolOrDefault> DebugifyAndStripAll(
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"Debugify MIR before and Strip debug after "
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"each pass except those known to be unsafe when debug info is present"),
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cl::ZeroOrMore);
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static cl::opt<cl::boolOrDefault> DebugifyCheckAndStripAll(
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"debugify-check-and-strip-all-safe", cl::Hidden,
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cl::desc(
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"Debugify MIR before, by checking and stripping the debug info after, "
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"each pass except those known to be unsafe when debug info is present"),
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cl::ZeroOrMore);
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enum RunOutliner { AlwaysOutline, NeverOutline, TargetDefault };
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// Enable or disable the MachineOutliner.
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static cl::opt<RunOutliner> EnableMachineOutliner(
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@ -631,26 +625,15 @@ void TargetPassConfig::addStripDebugPass() {
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PM->add(createStripDebugMachineModulePass(/*OnlyDebugified=*/true));
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}
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void TargetPassConfig::addCheckDebugPass() {
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PM->add(createCheckDebugMachineModulePass());
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}
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void TargetPassConfig::addMachinePrePasses(bool AllowDebugify) {
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if (AllowDebugify && DebugifyIsSafe &&
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(DebugifyAndStripAll == cl::BOU_TRUE ||
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DebugifyCheckAndStripAll == cl::BOU_TRUE))
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if (AllowDebugify && DebugifyAndStripAll == cl::BOU_TRUE && DebugifyIsSafe)
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addDebugifyPass();
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}
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void TargetPassConfig::addMachinePostPasses(const std::string &Banner,
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bool AllowVerify, bool AllowStrip) {
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if (DebugifyIsSafe) {
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if (DebugifyCheckAndStripAll == cl::BOU_TRUE) {
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addCheckDebugPass();
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addStripDebugPass();
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} else if (DebugifyAndStripAll == cl::BOU_TRUE)
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addStripDebugPass();
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}
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if (DebugifyAndStripAll == cl::BOU_TRUE && DebugifyIsSafe)
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addStripDebugPass();
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if (AllowVerify)
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addVerifyPass(Banner);
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}
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@ -13,17 +13,17 @@ body: |
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liveins: $x0
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; CHECK-LABEL: name: fconstant_to_constant_s32
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; CHECK: liveins: $x0
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0, debug-location !11
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; CHECK: DBG_VALUE [[COPY]](p0), $noreg, !9, !DIExpression(), debug-location !11
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3FA99999A0000000, debug-location !DILocation(line: 2, column: 1, scope: !6)
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; CHECK: DBG_VALUE [[C]](s32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 2, column: 1, scope: !6)
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 524, debug-location !DILocation(line: 3, column: 1, scope: !6)
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; CHECK: DBG_VALUE [[C1]](s64), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 3, column: 1, scope: !6)
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; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s64), debug-location !DILocation(line: 4, column: 1, scope: !6)
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; CHECK: DBG_VALUE [[PTR_ADD]](p0), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 4, column: 1, scope: !6)
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; CHECK: G_STORE [[C]](s32), [[PTR_ADD]](p0), debug-location !DILocation(line: 5, column: 1, scope: !6) :: (store 4)
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; CHECK: DBG_VALUE 0, $noreg, !9, !DIExpression(), debug-location !DILocation(line: 5, column: 1, scope: !6)
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; CHECK: RET_ReallyLR debug-location !DILocation(line: 6, column: 1, scope: !6)
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; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0, debug-location !10
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; CHECK: DBG_VALUE [[COPY]](p0), $noreg, !8, !DIExpression(), debug-location !10
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x3FA99999A0000000, debug-location !DILocation(line: 2, column: 1, scope: !5)
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; CHECK: DBG_VALUE [[C]](s32), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 2, column: 1, scope: !5)
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 524, debug-location !DILocation(line: 3, column: 1, scope: !5)
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; CHECK: DBG_VALUE [[C1]](s64), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 3, column: 1, scope: !5)
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; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C1]](s64), debug-location !DILocation(line: 4, column: 1, scope: !5)
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; CHECK: DBG_VALUE [[PTR_ADD]](p0), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 4, column: 1, scope: !5)
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; CHECK: G_STORE [[C]](s32), [[PTR_ADD]](p0), debug-location !DILocation(line: 5, column: 1, scope: !5) :: (store 4)
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; CHECK: DBG_VALUE 0, $noreg, !8, !DIExpression(), debug-location !DILocation(line: 5, column: 1, scope: !5)
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; CHECK: RET_ReallyLR debug-location !DILocation(line: 6, column: 1, scope: !5)
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%0:_(p0) = COPY $x0
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%3:_(s32) = G_FCONSTANT float 0x3FA99999A0000000
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%1:_(s64) = G_CONSTANT i64 524
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@ -36,41 +36,41 @@ body: |
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; CHECK: bb.0:
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; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
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; CHECK: liveins: $w0
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0, debug-location !11
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; CHECK: DBG_VALUE [[COPY]](s32), $noreg, !9, !DIExpression(), debug-location !11
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0, debug-location !DILocation(line: 2, column: 1, scope: !6)
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; CHECK: DBG_VALUE [[C]](s32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 2, column: 1, scope: !6)
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; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1, debug-location !DILocation(line: 3, column: 1, scope: !6)
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; CHECK: DBG_VALUE [[C1]](s32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 3, column: 1, scope: !6)
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; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2, debug-location !DILocation(line: 4, column: 1, scope: !6)
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; CHECK: DBG_VALUE [[C2]](s32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 4, column: 1, scope: !6)
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; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ugt), [[COPY]](s32), [[C]], debug-location !DILocation(line: 5, column: 1, scope: !6)
|
||||
; CHECK: DBG_VALUE [[ICMP]](s1), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 5, column: 1, scope: !6)
|
||||
; CHECK: G_BRCOND [[ICMP]](s1), %bb.1, debug-location !DILocation(line: 6, column: 1, scope: !6)
|
||||
; CHECK: G_BR %bb.2, debug-location !DILocation(line: 7, column: 1, scope: !6)
|
||||
; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w0, debug-location !10
|
||||
; CHECK: DBG_VALUE [[COPY]](s32), $noreg, !8, !DIExpression(), debug-location !10
|
||||
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0, debug-location !DILocation(line: 2, column: 1, scope: !5)
|
||||
; CHECK: DBG_VALUE [[C]](s32), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 2, column: 1, scope: !5)
|
||||
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1, debug-location !DILocation(line: 3, column: 1, scope: !5)
|
||||
; CHECK: DBG_VALUE [[C1]](s32), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 3, column: 1, scope: !5)
|
||||
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2, debug-location !DILocation(line: 4, column: 1, scope: !5)
|
||||
; CHECK: DBG_VALUE [[C2]](s32), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 4, column: 1, scope: !5)
|
||||
; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ugt), [[COPY]](s32), [[C]], debug-location !DILocation(line: 5, column: 1, scope: !5)
|
||||
; CHECK: DBG_VALUE [[ICMP]](s1), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 5, column: 1, scope: !5)
|
||||
; CHECK: G_BRCOND [[ICMP]](s1), %bb.1, debug-location !DILocation(line: 6, column: 1, scope: !5)
|
||||
; CHECK: G_BR %bb.2, debug-location !DILocation(line: 7, column: 1, scope: !5)
|
||||
; CHECK: bb.1:
|
||||
; CHECK: successors: %bb.3(0x80000000)
|
||||
; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C1]], debug-location !DILocation(line: 8, column: 1, scope: !6)
|
||||
; CHECK: DBG_VALUE [[ADD]](s32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 8, column: 1, scope: !6)
|
||||
; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ADD]](s32), debug-location !DILocation(line: 9, column: 1, scope: !6)
|
||||
; CHECK: DBG_VALUE [[TRUNC]](s1), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 9, column: 1, scope: !6)
|
||||
; CHECK: G_BR %bb.3, debug-location !DILocation(line: 10, column: 1, scope: !6)
|
||||
; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C1]], debug-location !DILocation(line: 8, column: 1, scope: !5)
|
||||
; CHECK: DBG_VALUE [[ADD]](s32), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 8, column: 1, scope: !5)
|
||||
; CHECK: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ADD]](s32), debug-location !DILocation(line: 9, column: 1, scope: !5)
|
||||
; CHECK: DBG_VALUE [[TRUNC]](s1), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 9, column: 1, scope: !5)
|
||||
; CHECK: G_BR %bb.3, debug-location !DILocation(line: 10, column: 1, scope: !5)
|
||||
; CHECK: bb.2:
|
||||
; CHECK: successors: %bb.3(0x80000000)
|
||||
; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C2]], debug-location !DILocation(line: 11, column: 1, scope: !6)
|
||||
; CHECK: DBG_VALUE [[ADD1]](s32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 11, column: 1, scope: !6)
|
||||
; CHECK: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[ADD1]](s32), debug-location !DILocation(line: 12, column: 1, scope: !6)
|
||||
; CHECK: DBG_VALUE [[TRUNC1]](s1), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 12, column: 1, scope: !6)
|
||||
; CHECK: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C2]], debug-location !DILocation(line: 11, column: 1, scope: !5)
|
||||
; CHECK: DBG_VALUE [[ADD1]](s32), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 11, column: 1, scope: !5)
|
||||
; CHECK: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[ADD1]](s32), debug-location !DILocation(line: 12, column: 1, scope: !5)
|
||||
; CHECK: DBG_VALUE [[TRUNC1]](s1), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 12, column: 1, scope: !5)
|
||||
; CHECK: bb.3:
|
||||
; CHECK: [[PHI:%[0-9]+]]:_(s1) = G_PHI [[TRUNC]](s1), %bb.1, [[TRUNC1]](s1), %bb.2, debug-location !DILocation(line: 13, column: 1, scope: !6)
|
||||
; CHECK: [[PHI1:%[0-9]+]]:_(s1) = G_PHI [[TRUNC]](s1), %bb.1, [[TRUNC1]](s1), %bb.2, debug-location !DILocation(line: 14, column: 1, scope: !6)
|
||||
; CHECK: DBG_VALUE [[PHI]](s1), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 13, column: 1, scope: !6)
|
||||
; CHECK: DBG_VALUE [[PHI1]](s1), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 14, column: 1, scope: !6)
|
||||
; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[PHI]](s1), debug-location !DILocation(line: 15, column: 1, scope: !6)
|
||||
; CHECK: DBG_VALUE [[ZEXT]](s32), $noreg, !9, !DIExpression(), debug-location !DILocation(line: 15, column: 1, scope: !6)
|
||||
; CHECK: $w0 = COPY [[ZEXT]](s32), debug-location !DILocation(line: 16, column: 1, scope: !6)
|
||||
; CHECK: DBG_VALUE $w0, $noreg, !9, !DIExpression(), debug-location !DILocation(line: 16, column: 1, scope: !6)
|
||||
; CHECK: RET_ReallyLR implicit $w0, debug-location !DILocation(line: 17, column: 1, scope: !6)
|
||||
; CHECK: [[PHI:%[0-9]+]]:_(s1) = G_PHI [[TRUNC]](s1), %bb.1, [[TRUNC1]](s1), %bb.2, debug-location !DILocation(line: 13, column: 1, scope: !5)
|
||||
; CHECK: [[PHI1:%[0-9]+]]:_(s1) = G_PHI [[TRUNC]](s1), %bb.1, [[TRUNC1]](s1), %bb.2, debug-location !DILocation(line: 14, column: 1, scope: !5)
|
||||
; CHECK: DBG_VALUE [[PHI]](s1), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 13, column: 1, scope: !5)
|
||||
; CHECK: DBG_VALUE [[PHI1]](s1), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 14, column: 1, scope: !5)
|
||||
; CHECK: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[PHI]](s1), debug-location !DILocation(line: 15, column: 1, scope: !5)
|
||||
; CHECK: DBG_VALUE [[ZEXT]](s32), $noreg, !8, !DIExpression(), debug-location !DILocation(line: 15, column: 1, scope: !5)
|
||||
; CHECK: $w0 = COPY [[ZEXT]](s32), debug-location !DILocation(line: 16, column: 1, scope: !5)
|
||||
; CHECK: DBG_VALUE $w0, $noreg, !8, !DIExpression(), debug-location !DILocation(line: 16, column: 1, scope: !5)
|
||||
; CHECK: RET_ReallyLR implicit $w0, debug-location !DILocation(line: 17, column: 1, scope: !5)
|
||||
bb.0:
|
||||
successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
||||
liveins: $w0
|
||||
|
||||
@ -1,79 +0,0 @@
|
||||
# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=mir-check-debugify -o - %s 2>&1 | FileCheck %s
|
||||
--- |
|
||||
; ModuleID = 'check-line-and-variables.mir'
|
||||
source_filename = "check-line-and-variables.c"
|
||||
|
||||
@ga = dso_local local_unnamed_addr global i32 2, align 4
|
||||
|
||||
; Function Attrs: nofree norecurse nounwind uwtable writeonly
|
||||
define dso_local i32 @foo(i32 %a, i32 %b) local_unnamed_addr #0 !dbg !9 {
|
||||
entry:
|
||||
%add = add nsw i32 %b, %a, !dbg !15
|
||||
call void @llvm.dbg.value(metadata i32 %add, metadata !12, metadata !DIExpression()), !dbg !15
|
||||
%mul = shl nsw i32 %add, 1, !dbg !16
|
||||
call void @llvm.dbg.value(metadata i32 %mul, metadata !14, metadata !DIExpression()), !dbg !16
|
||||
store i32 %mul, i32* @ga, align 4, !dbg !17
|
||||
ret i32 %add, !dbg !18
|
||||
}
|
||||
|
||||
declare void @llvm.dbg.value(metadata, metadata, metadata) #1
|
||||
|
||||
!llvm.module.flags = !{!0, !1}
|
||||
!llvm.ident = !{!2}
|
||||
!llvm.dbg.cu = !{!3}
|
||||
!llvm.mir.debugify = !{!6, !7}
|
||||
!llvm.debugify = !{!8, !7}
|
||||
|
||||
!0 = !{i32 1, !"wchar_size", i32 4}
|
||||
!1 = !{i32 2, !"Debug Info Version", i32 3}
|
||||
!2 = !{!"clang version 12.0.0 (https://github.com/llvm/llvm-project.git c0a922b3db2d39f36c0c01776cce90cc160a7d62)"}
|
||||
!3 = distinct !DICompileUnit(language: DW_LANG_C, file: !4, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !5)
|
||||
!4 = !DIFile(filename: "main.mir", directory: "/")
|
||||
!5 = !{}
|
||||
!6 = !{i32 6}
|
||||
!7 = !{i32 2}
|
||||
!8 = !{i32 4}
|
||||
!9 = distinct !DISubprogram(name: "foo", linkageName: "foo", scope: null, file: !4, line: 1, type: !10, scopeLine: 1, spFlags: DISPFlagDefinition | DISPFlagOptimized, unit: !3, retainedNodes: !11)
|
||||
!10 = !DISubroutineType(types: !5)
|
||||
!11 = !{!12, !14}
|
||||
!12 = !DILocalVariable(name: "1", scope: !9, file: !4, line: 1, type: !13)
|
||||
!13 = !DIBasicType(name: "ty32", size: 32, encoding: DW_ATE_unsigned)
|
||||
!14 = !DILocalVariable(name: "2", scope: !9, file: !4, line: 2, type: !13)
|
||||
!15 = !DILocation(line: 1, column: 1, scope: !9)
|
||||
!16 = !DILocation(line: 2, column: 1, scope: !9)
|
||||
!17 = !DILocation(line: 3, column: 1, scope: !9)
|
||||
!18 = !DILocation(line: 4, column: 1, scope: !9)
|
||||
|
||||
...
|
||||
---
|
||||
name: foo
|
||||
body: |
|
||||
bb.0.entry:
|
||||
liveins: $edi, $esi
|
||||
|
||||
%1:gr32 = COPY $esi, debug-location !15
|
||||
DBG_VALUE %1, $noreg, !12, !DIExpression(), debug-location !15
|
||||
; Let it missing !14 and debug-location !16
|
||||
; %0:gr32 = COPY $edi, debug-location !16
|
||||
; DBG_VALUE %0, $noreg, !14, !DIExpression(), debug-location !16
|
||||
%0:gr32 = COPY $edi
|
||||
%2:gr32 = nsw ADD32rr %1, %0, implicit-def dead $eflags, debug-location !17
|
||||
DBG_VALUE %2, $noreg, !12, !DIExpression(), debug-location !17
|
||||
DBG_VALUE $eflags, $noreg, !12, !DIExpression(), debug-location !17
|
||||
%3:gr32 = nsw ADD32rr %2, %2, implicit-def dead $eflags, debug-location !18
|
||||
DBG_VALUE %3, $noreg, !12, !DIExpression(), debug-location !18
|
||||
DBG_VALUE $eflags, $noreg, !12, !DIExpression(), debug-location !18
|
||||
MOV32mr $rip, 1, $noreg, @ga, $noreg, killed %3, debug-location !DILocation(line: 5, column: 1, scope: !9) :: (store 4 into @ga, !tbaa !18)
|
||||
DBG_VALUE 0, $noreg, !12, !DIExpression(), debug-location !DILocation(line: 5, column: 1, scope: !9)
|
||||
; Let it miss Line 6: Change "!DILocation(line: 6, ..." to "!DILocation(line: 5, ..."
|
||||
$eax = COPY %2, debug-location !DILocation(line: 5, column: 1, scope: !9)
|
||||
DBG_VALUE $eax, $noreg, !12, !DIExpression(), debug-location !DILocation(line: 6, column: 1, scope: !9)
|
||||
RET 0, $eax, debug-location !DILocation(line: 7, column: 1, scope: !9)
|
||||
|
||||
;CHECK: WARNING: Instruction with empty DebugLoc in function foo --%1:gr32 = COPY $edi
|
||||
;CHECK-NEXT: WARNING: Missing line 2
|
||||
;CHECK-NEXT: WARNING: Missing line 6
|
||||
;CHECK-NEXT: WARNING: Missing variable 2
|
||||
;CHECK-NEXT: Machine IR debug info check: FAIL
|
||||
|
||||
...
|
||||
@ -1,29 +0,0 @@
|
||||
; RUN: llc -debugify-check-and-strip-all-safe -o - %s 2>&1 | FileCheck %s
|
||||
|
||||
; ModuleID = 'main.c'
|
||||
source_filename = "main.c"
|
||||
|
||||
@ga = dso_local global i32 2, align 4
|
||||
|
||||
define dso_local i32 @foo(i32 %a, i32 %b) {
|
||||
entry:
|
||||
%a.addr = alloca i32, align 4
|
||||
%b.addr = alloca i32, align 4
|
||||
%c = alloca i32, align 4
|
||||
store i32 %a, i32* %a.addr, align 4
|
||||
store i32 %b, i32* %b.addr, align 4
|
||||
%0 = load i32, i32* %a.addr, align 4
|
||||
%1 = load i32, i32* %b.addr, align 4
|
||||
%add = add nsw i32 %0, %1
|
||||
store i32 %add, i32* %c, align 4
|
||||
%2 = load i32, i32* %c, align 4
|
||||
%mul = mul nsw i32 %2, 2
|
||||
store i32 %mul, i32* @ga, align 4
|
||||
%3 = load i32, i32* %c, align 4
|
||||
ret i32 %3
|
||||
}
|
||||
|
||||
; Different Back-Ends may have different number of passes, here we only
|
||||
; check two of them to make sure -debugify-check-and-strip-all-safe works.
|
||||
;CHECK: Machine IR debug info check: PASS
|
||||
;CHECK: Machine IR debug info check: PASS
|
||||
@ -1,69 +0,0 @@
|
||||
# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=mir-debugify,dead-mi-elimination,mir-check-debugify -o - %s 2>&1 | FileCheck %s
|
||||
# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=mir-debugify,mir-check-debugify -o - %s 2>&1 | FileCheck %s --check-prefix=CHECK-PASS
|
||||
--- |
|
||||
; ModuleID = 'check-line-and-variables.mir'
|
||||
source_filename = "check-line-and-variables.ll"
|
||||
|
||||
@ga = dso_local global i32 2, align 4
|
||||
|
||||
; Function Attrs: noinline nounwind optnone uwtable
|
||||
define dso_local i32 @foo(i32 %a, i32 %b) {
|
||||
entry:
|
||||
%a.addr = alloca i32, align 4
|
||||
%b.addr = alloca i32, align 4
|
||||
%c = alloca i32, align 4
|
||||
store i32 %a, i32* %a.addr, align 4
|
||||
store i32 %b, i32* %b.addr, align 4
|
||||
%0 = load i32, i32* %a.addr, align 4
|
||||
%1 = load i32, i32* %b.addr, align 4
|
||||
%add = add nsw i32 %0, %1
|
||||
store i32 %add, i32* %c, align 4
|
||||
%2 = load i32, i32* %c, align 4
|
||||
%mul = mul nsw i32 %2, 2
|
||||
store i32 %mul, i32* @ga, align 4
|
||||
%3 = load i32, i32* %c, align 4
|
||||
; dead-mi-elimination will remove %4 = ...
|
||||
%4 = load i32, i32* %a.addr, align 4
|
||||
ret i32 %3
|
||||
}
|
||||
|
||||
...
|
||||
---
|
||||
name: foo
|
||||
alignment: 16
|
||||
stack:
|
||||
- { id: 0, name: a.addr, type: default, offset: 0, size: 4, alignment: 4,
|
||||
stack-id: default, callee-saved-register: '', callee-saved-restored: true,
|
||||
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
|
||||
- { id: 1, name: b.addr, type: default, offset: 0, size: 4, alignment: 4,
|
||||
stack-id: default, callee-saved-register: '', callee-saved-restored: true,
|
||||
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
|
||||
- { id: 2, name: c, type: default, offset: 0, size: 4, alignment: 4,
|
||||
stack-id: default, callee-saved-register: '', callee-saved-restored: true,
|
||||
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
|
||||
body: |
|
||||
bb.0.entry:
|
||||
liveins: $edi, $esi
|
||||
|
||||
%2:gr32 = COPY $esi
|
||||
%0:gr32 = COPY $edi
|
||||
%1:gr32 = COPY killed %0
|
||||
%3:gr32 = COPY killed %2
|
||||
MOV32mr %stack.0.a.addr, 1, $noreg, 0, $noreg, %1 :: (store 4 into %ir.a.addr)
|
||||
MOV32mr %stack.1.b.addr, 1, $noreg, 0, $noreg, %3 :: (store 4 into %ir.b.addr)
|
||||
%14:gr32 = MOV32rm %stack.0.a.addr, 1, $noreg, 0, $noreg :: (load 4 from %ir.a.addr)
|
||||
%13:gr32 = ADD32rm killed %14, %stack.1.b.addr, 1, $noreg, 0, $noreg, implicit-def $eflags :: (load 4 from %ir.b.addr)
|
||||
; dead-mi-elimination will remove %15:gr32 = ...
|
||||
%15:gr32 = MOV32rm %stack.0.a.addr, 1, $noreg, 0, $noreg :: (load 4 from %ir.a.addr)
|
||||
MOV32mr %stack.2.c, 1, $noreg, 0, $noreg, killed %13 :: (store 4 into %ir.c)
|
||||
%9:gr32 = MOV32rm %stack.2.c, 1, $noreg, 0, $noreg :: (load 4 from %ir.c)
|
||||
%8:gr32 = SHL32ri killed %9, 1, implicit-def $eflags
|
||||
MOV32mr $noreg, 1, $noreg, @ga, $noreg, killed %8 :: (store 4 into @ga)
|
||||
%5:gr32 = MOV32rm %stack.2.c, 1, $noreg, 0, $noreg :: (load 4 from %ir.c)
|
||||
$eax = COPY %5
|
||||
RETQ implicit $eax
|
||||
|
||||
;CHECK: WARNING: Missing line 9
|
||||
;CHECK-NEXT: Machine IR debug info check: FAIL
|
||||
;CHECK-PASS: Machine IR debug info check: PASS
|
||||
...
|
||||
@ -17,10 +17,10 @@
|
||||
ret i32 %sub
|
||||
}
|
||||
|
||||
; ALL: !llvm.dbg.cu = !{![[CU:[0-9]+]]}
|
||||
; ALL: !llvm.dbg.cu = !{!0}
|
||||
; ALL: !llvm.debugify =
|
||||
; ALL: !llvm.module.flags = !{![[VERSION:[0-9]+]]}
|
||||
; ALL: ![[CU]] = distinct !DICompileUnit(
|
||||
; ALL: !0 = distinct !DICompileUnit(
|
||||
; ALL: ![[VERSION]] = !{i32 2, !"Debug Info Version", i32 3}
|
||||
; VALUE: [[VAR1:![0-9]+]] = !DILocalVariable(name: "1"
|
||||
; VALUE: [[VAR2:![0-9]+]] = !DILocalVariable(name: "2"
|
||||
@ -44,8 +44,8 @@ body: |
|
||||
; VALUE: DBG_VALUE %1(s32), $noreg, [[VAR2]], !DIExpression(), debug-location [[L2]]
|
||||
; ALL: %2:_(s32) = G_CONSTANT i32 2, debug-location [[L3]]
|
||||
; VALUE: DBG_VALUE %2(s32), $noreg, [[VAR1]], !DIExpression(), debug-location [[L3]]
|
||||
; ALL: %3:_(s32) = G_ADD %0, %2, debug-location !DILocation(line: 4, column: 1, scope: [[SP:![0-9]+]])
|
||||
; ALL: %3:_(s32) = G_ADD %0, %2, debug-location !DILocation(line: 4, column: 1, scope: !6)
|
||||
; VALUE: DBG_VALUE %3(s32), $noreg, [[VAR1]], !DIExpression(), debug-location !DILocation(line: 4
|
||||
; ALL: %4:_(s32) = G_SUB %3, %1, debug-location !DILocation(line: 5, column: 1, scope: [[SP]])
|
||||
; ALL: %4:_(s32) = G_SUB %3, %1, debug-location !DILocation(line: 5, column: 1, scope: !6)
|
||||
; VALUE: DBG_VALUE %4(s32), $noreg, [[VAR1]], !DIExpression(), debug-location !DILocation(line: 5
|
||||
...
|
||||
|
||||
@ -99,7 +99,6 @@ static_library("CodeGen") {
|
||||
"MachineBlockPlacement.cpp",
|
||||
"MachineBranchProbabilityInfo.cpp",
|
||||
"MachineCSE.cpp",
|
||||
"MachineCheckDebugify.cpp",
|
||||
"MachineCombiner.cpp",
|
||||
"MachineCopyPropagation.cpp",
|
||||
"MachineDebugify.cpp",
|
||||
|
||||
Loading…
Reference in New Issue
Block a user