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[X86] Remove and autoupgrade 512-bit non-temporal store intrinsics.
llvm-svn: 274966
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b16a1e2b7f
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08c620b494
@ -1773,18 +1773,6 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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[IntrArgMemOnly]>;
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}
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// Store ops using non-temporal hint
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let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_avx512_storent_q_512 :
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GCCBuiltin<"__builtin_ia32_movntdq512">,
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Intrinsic<[], [llvm_ptr_ty, llvm_v8i64_ty], [IntrArgMemOnly]>;
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def int_x86_avx512_storent_pd_512 :
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GCCBuiltin<"__builtin_ia32_movntpd512">,
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Intrinsic<[], [llvm_ptr_ty, llvm_v8f64_ty], [IntrArgMemOnly]>;
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def int_x86_avx512_storent_ps_512 :
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GCCBuiltin<"__builtin_ia32_movntps512">,
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Intrinsic<[], [llvm_ptr_ty, llvm_v16f32_ty], [IntrArgMemOnly]>;
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}
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//===----------------------------------------------------------------------===//
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// AVX2
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@ -255,6 +255,7 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
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Name == "avx2.vextracti128" ||
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Name.startswith("sse4a.movnt.") ||
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Name.startswith("avx.movnt.") ||
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Name.startswith("avx512.storent.") ||
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Name == "sse2.storel.dq" ||
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Name.startswith("sse.storeu.") ||
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Name.startswith("sse2.storeu.") ||
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@ -738,7 +739,8 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
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// Remove intrinsic.
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CI->eraseFromParent();
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return;
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} else if (IsX86 && Name.startswith("avx.movnt.")) {
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} else if (IsX86 && (Name.startswith("avx.movnt.") ||
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Name.startswith("avx512.storent."))) {
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Module *M = F->getParent();
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SmallVector<Metadata *, 1> Elts;
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Elts.push_back(
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@ -752,7 +754,9 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
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Value *BC = Builder.CreateBitCast(Arg0,
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PointerType::getUnqual(Arg1->getType()),
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"cast");
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StoreInst *SI = Builder.CreateAlignedStore(Arg1, BC, 32);
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VectorType *VTy = cast<VectorType>(Arg1->getType());
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StoreInst *SI = Builder.CreateAlignedStore(Arg1, BC,
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VTy->getBitWidth() / 8);
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SI->setMetadata(M->getMDKindID("nontemporal"), Node);
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// Remove intrinsic.
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@ -4105,13 +4105,6 @@ bool X86TargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info,
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Info.writeMem = true;
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break;
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}
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case STOREANT: {
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Info.ptrVal = I.getArgOperand(0);
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Info.memVT = MVT::getVT(I.getArgOperand(1)->getType());
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Info.align = Info.memVT.getSizeInBits()/8;
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Info.writeMem = true;
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break;
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}
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default:
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return false;
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}
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@ -18523,20 +18516,6 @@ static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget &Subtarget,
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Mask, PassThru, Subtarget, DAG), Chain};
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return DAG.getMergeValues(Results, dl);
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}
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case STOREANT: {
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// Store (MOVNTPD, MOVNTPS, MOVNTDQ) using non-temporal hint intrinsic implementation.
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SDValue Data = Op.getOperand(3);
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SDValue Addr = Op.getOperand(2);
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SDValue Chain = Op.getOperand(0);
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MemIntrinsicSDNode *MemIntr = dyn_cast<MemIntrinsicSDNode>(Op);
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assert(MemIntr && "Expected MemIntrinsicSDNode!");
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MachineMemOperand *MMO = MemIntr->getMemOperand();
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MMO->setFlags(MachineMemOperand::MONonTemporal);
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return DAG.getStore(Chain, dl, Data, Addr, MMO);
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}
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}
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}
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@ -33,7 +33,7 @@ enum IntrinsicType : uint16_t {
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INTR_TYPE_SCALAR_MASK_RM, INTR_TYPE_3OP_SCALAR_MASK_RM,
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COMPRESS_EXPAND_IN_REG, COMPRESS_TO_MEM, BRCST_SUBVEC_TO_VEC, BRCST32x2_TO_VEC,
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TRUNCATE_TO_MEM_VI8, TRUNCATE_TO_MEM_VI16, TRUNCATE_TO_MEM_VI32,
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EXPAND_FROM_MEM, STOREANT, INSERT_SUBVEC,
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EXPAND_FROM_MEM, INSERT_SUBVEC,
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TERLOG_OP_MASK, TERLOG_OP_MASKZ, BROADCASTM, KUNPCK, FIXUPIMM, FIXUPIMM_MASKZ, FIXUPIMMS,
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FIXUPIMMS_MASKZ, CONVERT_MASK_TO_VEC, CONVERT_TO_MASK
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};
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@ -216,9 +216,6 @@ static const IntrinsicData IntrinsicsWithChain[] = {
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X86_INTRINSIC_DATA(avx512_scattersiv4_si, SCATTER, X86::VPSCATTERDDZ128mr, 0),
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X86_INTRINSIC_DATA(avx512_scattersiv8_sf, SCATTER, X86::VSCATTERDPSZ256mr, 0),
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X86_INTRINSIC_DATA(avx512_scattersiv8_si, SCATTER, X86::VPSCATTERDDZ256mr, 0),
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X86_INTRINSIC_DATA(avx512_storent_pd_512, STOREANT, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_storent_ps_512, STOREANT, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(avx512_storent_q_512, STOREANT, ISD::DELETED_NODE, 0),
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X86_INTRINSIC_DATA(rdpmc, RDPMC, X86ISD::RDPMC_DAG, 0),
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X86_INTRINSIC_DATA(rdrand_16, RDRAND, X86ISD::RDRAND, 0),
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X86_INTRINSIC_DATA(rdrand_32, RDRAND, X86ISD::RDRAND, 0),
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@ -923,3 +923,36 @@ define <8 x i64> @test_x86_avx512_maskz_psrai_q(<8 x i64> %a0, i8 %mask) {
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declare <8 x i64> @llvm.x86.avx512.mask.psrai.q(<8 x i64>, i32, <8 x i64>, i8) nounwind readnone
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declare void @llvm.x86.avx512.storent.q.512(i8*, <8 x i64>)
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define void@test_storent_q_512(<8 x i64> %data, i8* %ptr) {
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; CHECK-LABEL: test_storent_q_512:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vmovntdq %zmm0, (%rdi)
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; CHECK-NEXT: retq
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call void @llvm.x86.avx512.storent.q.512(i8* %ptr, <8 x i64> %data)
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ret void
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}
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declare void @llvm.x86.avx512.storent.pd.512(i8*, <8 x double>)
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define void @test_storent_pd_512(<8 x double> %data, i8* %ptr) {
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; CHECK-LABEL: test_storent_pd_512:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vmovntpd %zmm0, (%rdi)
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; CHECK-NEXT: retq
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call void @llvm.x86.avx512.storent.pd.512(i8* %ptr, <8 x double> %data)
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ret void
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}
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declare void @llvm.x86.avx512.storent.ps.512(i8*, <16 x float>)
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define void @test_storent_ps_512(<16 x float> %data, i8* %ptr) {
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; CHECK-LABEL: test_storent_ps_512:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vmovntps %zmm0, (%rdi)
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; CHECK-NEXT: retq
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call void @llvm.x86.avx512.storent.ps.512(i8* %ptr, <16 x float> %data)
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ret void
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}
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@ -6309,39 +6309,6 @@ define <2 x double>@test_int_x86_avx512_maskz_fixupimm_sd(<2 x double> %x0, <2 x
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ret <2 x double> %res4
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}
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declare void @llvm.x86.avx512.storent.q.512(i8*, <8 x i64>)
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define void@test_storent_q_512(<8 x i64> %data, i8* %ptr) {
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; CHECK-LABEL: test_storent_q_512:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vmovntdq %zmm0, (%rdi)
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; CHECK-NEXT: retq
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call void @llvm.x86.avx512.storent.q.512(i8* %ptr, <8 x i64> %data)
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ret void
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}
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declare void @llvm.x86.avx512.storent.pd.512(i8*, <8 x double>)
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define void @test_storent_pd_512(<8 x double> %data, i8* %ptr) {
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; CHECK-LABEL: test_storent_pd_512:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vmovntpd %zmm0, (%rdi)
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; CHECK-NEXT: retq
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call void @llvm.x86.avx512.storent.pd.512(i8* %ptr, <8 x double> %data)
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ret void
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}
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declare void @llvm.x86.avx512.storent.ps.512(i8*, <16 x float>)
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define void @test_storent_ps_512(<16 x float> %data, i8* %ptr) {
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; CHECK-LABEL: test_storent_ps_512:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vmovntps %zmm0, (%rdi)
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; CHECK-NEXT: retq
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call void @llvm.x86.avx512.storent.ps.512(i8* %ptr, <16 x float> %data)
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ret void
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}
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declare i16 @llvm.x86.avx512.ptestnm.d.512(<16 x i32>, <16 x i32>, i16 %x2)
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define i16@test_int_x86_avx512_ptestnm_d_512(<16 x i32> %x0, <16 x i32> %x1, i16 %x2) {
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