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GlobalISel: Correct result type for G_FCMP in lowerFPTOUI

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Using the final result type doesn't make any sense. Use the natural
default boolean type for the select condition.
This commit is contained in:
Matt Arsenault 2020-01-04 17:06:47 -05:00 committed by Matt Arsenault
parent 546a3ee122
commit 08da10f080
3 changed files with 84 additions and 37 deletions
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4
lib/CodeGen/GlobalISel/LegalizerHelper.cpp
View File

@ -3996,8 +3996,10 @@ LegalizerHelper::lowerFPTOUI(MachineInstr &MI, unsigned TypeIdx, LLT Ty) {
MachineInstrBuilder ResHighBit = MIRBuilder.buildConstant(DstTy, TwoPExpInt);
MachineInstrBuilder Res = MIRBuilder.buildXor(DstTy, ResLowBits, ResHighBit);
const LLT S1 = LLT::scalar(1);
MachineInstrBuilder FCMP =
MIRBuilder.buildFCmp(CmpInst::FCMP_ULT, DstTy, Src, Threshold);
MIRBuilder.buildFCmp(CmpInst::FCMP_ULT, S1, Src, Threshold);
MIRBuilder.buildSelect(Dst, FCMP, FPTOSI, Res);
MI.eraseFromParent();

108
test/CodeGen/Mips/GlobalISel/legalizer/fptosi_and_fptoui.mir
View File

@ -351,7 +351,10 @@ body: |
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP32: $v0 = COPY [[SELECT]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f32tou32
@ -364,7 +367,10 @@ body: |
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP64: $v0 = COPY [[SELECT]](s32)
; FP64: RetRA implicit $v0
%0:_(s32) = COPY $f12
@ -391,11 +397,14 @@ body: |
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP32: $v0 = COPY [[AND]](s32)
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP32: $v0 = COPY [[AND1]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f32tou16
; FP64: liveins: $f12
@ -407,11 +416,14 @@ body: |
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP64: $v0 = COPY [[AND]](s32)
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP64: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP64: $v0 = COPY [[AND1]](s32)
; FP64: RetRA implicit $v0
%0:_(s32) = COPY $f12
%1:_(s16) = G_FPTOUI %0(s32)
@ -438,11 +450,14 @@ body: |
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP32: $v0 = COPY [[AND]](s32)
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP32: $v0 = COPY [[AND1]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f32tou8
; FP64: liveins: $f12
@ -454,11 +469,14 @@ body: |
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP64: $v0 = COPY [[AND]](s32)
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP64: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP64: $v0 = COPY [[AND1]](s32)
; FP64: RetRA implicit $v0
%0:_(s32) = COPY $f12
%1:_(s8) = G_FPTOUI %0(s32)
@ -525,7 +543,10 @@ body: |
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP32: $v0 = COPY [[SELECT]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f64tou32
@ -538,7 +559,10 @@ body: |
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP64: $v0 = COPY [[SELECT]](s32)
; FP64: RetRA implicit $v0
%0:_(s64) = COPY $d6
@ -565,11 +589,14 @@ body: |
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP32: $v0 = COPY [[AND]](s32)
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP32: $v0 = COPY [[AND1]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f64tou16
; FP64: liveins: $d6
@ -581,11 +608,14 @@ body: |
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP64: $v0 = COPY [[AND]](s32)
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP64: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP64: $v0 = COPY [[AND1]](s32)
; FP64: RetRA implicit $v0
%0:_(s64) = COPY $d6
%1:_(s16) = G_FPTOUI %0(s64)
@ -612,11 +642,14 @@ body: |
; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP32: $v0 = COPY [[AND]](s32)
; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP32: $v0 = COPY [[AND1]](s32)
; FP32: RetRA implicit $v0
; FP64-LABEL: name: f64tou8
; FP64: liveins: $d6
@ -628,11 +661,14 @@ body: |
; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[FCMP]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY [[FCMP]](s32)
; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[C2]]
; FP64: $v0 = COPY [[AND]](s32)
; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
; FP64: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY [[SELECT]](s32)
; FP64: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[C3]]
; FP64: $v0 = COPY [[AND1]](s32)
; FP64: RetRA implicit $v0
%0:_(s64) = COPY $d6
%1:_(s8) = G_FPTOUI %0(s64)

9
test/CodeGen/Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll
View File

@ -151,6 +151,7 @@ define i32 @f32tou32(float %a) {
; MIPS32-NEXT: addiu $3, $zero, 1
; MIPS32-NEXT: c.ult.s $f12, $f0
; MIPS32-NEXT: movf $3, $zero, $fcc0
; MIPS32-NEXT: andi $3, $3, 1
; MIPS32-NEXT: movn $2, $1, $3
; MIPS32-NEXT: jr $ra
; MIPS32-NEXT: nop
@ -174,6 +175,7 @@ define zeroext i16 @f32tou16(float %a) {
; MIPS32-NEXT: addiu $3, $zero, 1
; MIPS32-NEXT: c.ult.s $f12, $f0
; MIPS32-NEXT: movf $3, $zero, $fcc0
; MIPS32-NEXT: andi $3, $3, 1
; MIPS32-NEXT: movn $2, $1, $3
; MIPS32-NEXT: andi $2, $2, 65535
; MIPS32-NEXT: jr $ra
@ -198,6 +200,7 @@ define zeroext i8 @f32tou8(float %a) {
; MIPS32-NEXT: addiu $3, $zero, 1
; MIPS32-NEXT: c.ult.s $f12, $f0
; MIPS32-NEXT: movf $3, $zero, $fcc0
; MIPS32-NEXT: andi $3, $3, 1
; MIPS32-NEXT: movn $2, $1, $3
; MIPS32-NEXT: andi $2, $2, 255
; MIPS32-NEXT: jr $ra
@ -242,6 +245,7 @@ define i32 @f64tou32(double %a) {
; FP32-NEXT: addiu $3, $zero, 1
; FP32-NEXT: c.ult.d $f12, $f2
; FP32-NEXT: movf $3, $zero, $fcc0
; FP32-NEXT: andi $3, $3, 1
; FP32-NEXT: movn $2, $1, $3
; FP32-NEXT: jr $ra
; FP32-NEXT: nop
@ -262,6 +266,7 @@ define i32 @f64tou32(double %a) {
; FP64-NEXT: addiu $3, $zero, 1
; FP64-NEXT: c.ult.d $f12, $f1
; FP64-NEXT: movf $3, $zero, $fcc0
; FP64-NEXT: andi $3, $3, 1
; FP64-NEXT: movn $2, $1, $3
; FP64-NEXT: jr $ra
; FP64-NEXT: nop
@ -287,6 +292,7 @@ define zeroext i16 @f64tou16(double %a) {
; FP32-NEXT: addiu $3, $zero, 1
; FP32-NEXT: c.ult.d $f12, $f2
; FP32-NEXT: movf $3, $zero, $fcc0
; FP32-NEXT: andi $3, $3, 1
; FP32-NEXT: movn $2, $1, $3
; FP32-NEXT: andi $2, $2, 65535
; FP32-NEXT: jr $ra
@ -308,6 +314,7 @@ define zeroext i16 @f64tou16(double %a) {
; FP64-NEXT: addiu $3, $zero, 1
; FP64-NEXT: c.ult.d $f12, $f1
; FP64-NEXT: movf $3, $zero, $fcc0
; FP64-NEXT: andi $3, $3, 1
; FP64-NEXT: movn $2, $1, $3
; FP64-NEXT: andi $2, $2, 65535
; FP64-NEXT: jr $ra
@ -334,6 +341,7 @@ define zeroext i8 @f64tou8(double %a) {
; FP32-NEXT: addiu $3, $zero, 1
; FP32-NEXT: c.ult.d $f12, $f2
; FP32-NEXT: movf $3, $zero, $fcc0
; FP32-NEXT: andi $3, $3, 1
; FP32-NEXT: movn $2, $1, $3
; FP32-NEXT: andi $2, $2, 255
; FP32-NEXT: jr $ra
@ -355,6 +363,7 @@ define zeroext i8 @f64tou8(double %a) {
; FP64-NEXT: addiu $3, $zero, 1
; FP64-NEXT: c.ult.d $f12, $f1
; FP64-NEXT: movf $3, $zero, $fcc0
; FP64-NEXT: andi $3, $3, 1
; FP64-NEXT: movn $2, $1, $3
; FP64-NEXT: andi $2, $2, 255
; FP64-NEXT: jr $ra