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[AArch64][GlobalISel] Scalarize <2 x s64> G_MUL since we don't have native support for it.

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Differential Revision: https://reviews.llvm.org/D88437
This commit is contained in:
Amara Emerson 2020-09-28 09:46:26 -07:00
parent 117b16b4b6
commit 09394476cd
3 changed files with 41 additions and 3 deletions
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7
include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
View File

@ -827,6 +827,13 @@ public:
LegalizeMutations::scalarize(TypeIdx));
}
LegalizeRuleSet &scalarizeIf(LegalityPredicate Predicate, unsigned TypeIdx) {
using namespace LegalityPredicates;
return actionIf(LegalizeAction::FewerElements,
all(Predicate, isVector(typeIdx(TypeIdx))),
LegalizeMutations::scalarize(TypeIdx));
}
/// Ensure the scalar or element is at least as wide as Ty.
LegalizeRuleSet &minScalarOrElt(unsigned TypeIdx, const LLT Ty) {
using namespace LegalityPredicates;

8
lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
View File

@ -90,7 +90,13 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
.widenScalarToNextPow2(0);
getActionDefinitionsBuilder({G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR})
.legalFor({s32, s64, v2s32, v4s32, v2s64, v4s16, v8s16, v16s8})
.legalFor({s32, s64, v2s32, v4s32, v4s16, v8s16, v16s8})
.scalarizeIf(
[=](const LegalityQuery &Query) {
return Query.Opcode == G_MUL && Query.Types[0] == v2s64;
},
0)
.legalFor({v2s64})
.clampScalar(0, s32, s64)
.widenScalarToNextPow2(0)
.clampNumElements(0, v2s32, v4s32)

29
test/CodeGen/AArch64/GlobalISel/legalize-mul.mir
View File

@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s
# RUN: llc -march=aarch64 -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s
---
name: test_scalar_mul_small
body: |
@ -31,7 +31,7 @@ body: |
; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[COPY]], [[COPY1]]
; CHECK: [[SMULH:%[0-9]+]]:_(s64) = G_SMULH [[COPY]], [[COPY1]]
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 63
; CHECK: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[MUL]], [[C]]
; CHECK: [[ASHR:%[0-9]+]]:_(s64) = G_ASHR [[MUL]], [[C]](s64)
; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[SMULH]](s64), [[ASHR]]
; CHECK: $x0 = COPY [[MUL]](s64)
; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ICMP]](s32)
@ -66,3 +66,28 @@ body: |
$w0 = COPY %4(s32)
...
---
name: vector_mul_scalarize
liveins:
- { reg: '$q0' }
- { reg: '$q1' }
body: |
bb.1:
liveins: $q0, $q1
; CHECK-LABEL: name: vector_mul_scalarize
; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
; CHECK: [[COPY1:%[0-9]+]]:_(<2 x s64>) = COPY $q1
; CHECK: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
; CHECK: [[UV2:%[0-9]+]]:_(s64), [[UV3:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY1]](<2 x s64>)
; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[UV]], [[UV2]]
; CHECK: [[MUL1:%[0-9]+]]:_(s64) = G_MUL [[UV1]], [[UV3]]
; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[MUL]](s64), [[MUL1]](s64)
; CHECK: $q0 = COPY [[BUILD_VECTOR]](<2 x s64>)
; CHECK: RET_ReallyLR implicit $q0
%0:_(<2 x s64>) = COPY $q0
%1:_(<2 x s64>) = COPY $q1
%2:_(<2 x s64>) = G_MUL %0, %1
$q0 = COPY %2(<2 x s64>)
RET_ReallyLR implicit $q0
...