1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00

R600/SI: Change default register class for i32 to SReg_32

SIFixSGPRCopies is smart enough to handle this now.

llvm-svn: 206499
This commit is contained in:
Tom Stellard 2014-04-17 21:00:09 +00:00
parent ca9afaf1ed
commit 095d18364b

View File

@ -35,7 +35,7 @@ SITargetLowering::SITargetLowering(TargetMachine &TM) :
addRegisterClass(MVT::v32i8, &AMDGPU::SReg_256RegClass);
addRegisterClass(MVT::v64i8, &AMDGPU::SReg_512RegClass);
addRegisterClass(MVT::i32, &AMDGPU::VSrc_32RegClass);
addRegisterClass(MVT::i32, &AMDGPU::SReg_32RegClass);
addRegisterClass(MVT::f32, &AMDGPU::VSrc_32RegClass);
addRegisterClass(MVT::f64, &AMDGPU::VSrc_64RegClass);