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AMDGPU/GlobalISel: Lower SALU min/max to cmp+select
Use a change observer to apply a register bank to the newly created intermediate result register. llvm-svn: 364830
This commit is contained in:
Matt Arsenault
parent
a3034e0a78
commit
0984514ab5
@ -439,6 +439,22 @@ AMDGPURegisterBankInfo::getInstrAlternativeMappings(
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return AltMappings;
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}
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case TargetOpcode::G_SMIN:
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case TargetOpcode::G_SMAX:
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case TargetOpcode::G_UMIN:
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case TargetOpcode::G_UMAX: {
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static const OpRegBankEntry<3> Table[4] = {
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{ { AMDGPU::VGPRRegBankID, AMDGPU::VGPRRegBankID, AMDGPU::VGPRRegBankID }, 1 },
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{ { AMDGPU::VGPRRegBankID, AMDGPU::SGPRRegBankID, AMDGPU::VGPRRegBankID }, 1 },
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{ { AMDGPU::VGPRRegBankID, AMDGPU::VGPRRegBankID, AMDGPU::SGPRRegBankID }, 1 },
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// Scalar requires cmp+select
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{ { AMDGPU::SGPRRegBankID, AMDGPU::SGPRRegBankID, AMDGPU::SGPRRegBankID }, 2 }
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};
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const std::array<unsigned, 3> RegSrcOpIdx = { { 0, 1, 2 } };
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return addMappingFromTable<3>(MI, MRI, RegSrcOpIdx, makeArrayRef(Table));
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}
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case TargetOpcode::G_UADDE:
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case TargetOpcode::G_USUBE:
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case TargetOpcode::G_SADDE:
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@ -1000,6 +1016,28 @@ void AMDGPURegisterBankInfo::applyMappingImpl(
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llvm_unreachable("widen scalar should have succeeded");
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return;
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}
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case AMDGPU::G_SMIN:
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case AMDGPU::G_SMAX:
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case AMDGPU::G_UMIN:
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case AMDGPU::G_UMAX: {
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Register DstReg = MI.getOperand(0).getReg();
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const RegisterBank *DstBank = getRegBank(DstReg, MRI, *TRI);
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if (DstBank == &AMDGPU::VGPRRegBank)
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break;
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MachineFunction *MF = MI.getParent()->getParent();
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MachineIRBuilder B(MI);
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ApplySALUMapping ApplySALU(MRI);
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GISelObserverWrapper Observer(&ApplySALU);
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LegalizerHelper Helper(*MF, Observer, B);
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// Turn scalar min/max into a compare and select.
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LLT DstTy = MRI.getType(DstReg);
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if (Helper.lower(MI, 0, DstTy) != LegalizerHelper::Legalized)
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llvm_unreachable("lower should have succeeded");
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return;
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}
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case AMDGPU::G_SEXT:
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case AMDGPU::G_ZEXT: {
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Register SrcReg = MI.getOperand(1).getReg();
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@ -1441,16 +1479,13 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
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case AMDGPU::G_SSUBE:
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case AMDGPU::G_UMULH:
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case AMDGPU::G_SMULH:
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if (isSALUMapping(MI))
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return getDefaultMappingSOP(MI);
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LLVM_FALLTHROUGH;
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case AMDGPU::G_SMIN:
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case AMDGPU::G_SMAX:
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case AMDGPU::G_UMIN:
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case AMDGPU::G_UMAX:
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// TODO: min/max can be scalar, but requires expanding as a compare and
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// select.
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if (isSALUMapping(MI))
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return getDefaultMappingSOP(MI);
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LLVM_FALLTHROUGH;
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case AMDGPU::G_FADD:
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case AMDGPU::G_FSUB:
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@ -1,6 +1,6 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -verify-machineinstrs -regbankselect-fast -o - %s | FileCheck -check-prefix=FAST %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -verify-machineinstrs -regbankselect-greedy -o - %s | FileCheck -check-prefix=GREEDY %s
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---
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name: smax_ss
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@ -10,11 +10,16 @@ body: |
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bb.0:
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liveins: $sgpr0, $sgpr1
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; CHECK-LABEL: name: smax_ss
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; CHECK: [[SMAX:%[0-9]+]]:vgpr(s32) = G_SMAX [[COPY]], [[COPY2]]
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; FAST-LABEL: name: smax_ss
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; FAST: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; FAST: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; FAST: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[COPY1]]
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; FAST: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
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; GREEDY-LABEL: name: smax_ss
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; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[COPY1]]
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; GREEDY: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $sgpr1
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%2:_(s32) = G_SMAX %0, %1
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@ -28,10 +33,14 @@ body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; CHECK-LABEL: name: smax_sv
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[SMAX:%[0-9]+]]:vgpr(s32) = G_SMAX [[COPY]], [[COPY1]]
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; FAST-LABEL: name: smax_sv
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; FAST: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; FAST: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; FAST: [[SMAX:%[0-9]+]]:vgpr(s32) = G_SMAX [[COPY]], [[COPY1]]
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; GREEDY-LABEL: name: smax_sv
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; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GREEDY: [[SMAX:%[0-9]+]]:vgpr(s32) = G_SMAX [[COPY]], [[COPY1]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $vgpr0
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%2:_(s32) = G_SMAX %0, %1
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@ -45,11 +54,15 @@ body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; CHECK-LABEL: name: smax_vs
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; CHECK: [[SMAX:%[0-9]+]]:vgpr(s32) = G_SMAX [[COPY]], [[COPY2]]
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; FAST-LABEL: name: smax_vs
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; FAST: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; FAST: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; FAST: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; FAST: [[SMAX:%[0-9]+]]:vgpr(s32) = G_SMAX [[COPY]], [[COPY2]]
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; GREEDY-LABEL: name: smax_vs
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; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GREEDY: [[SMAX:%[0-9]+]]:vgpr(s32) = G_SMAX [[COPY]], [[COPY1]]
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $sgpr0
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%2:_(s32) = G_SMAX %0, %1
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@ -63,11 +76,42 @@ body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: smax_vv
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; CHECK: [[SMAX:%[0-9]+]]:vgpr(s32) = G_SMAX [[COPY]], [[COPY1]]
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; FAST-LABEL: name: smax_vv
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; FAST: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; FAST: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; FAST: [[SMAX:%[0-9]+]]:vgpr(s32) = G_SMAX [[COPY]], [[COPY1]]
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; GREEDY-LABEL: name: smax_vv
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; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GREEDY: [[SMAX:%[0-9]+]]:vgpr(s32) = G_SMAX [[COPY]], [[COPY1]]
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s32) = G_SMAX %0, %1
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...
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# FIXME: This should use VGPR instruction
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---
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name: smax_ss_vgpr_use
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1
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; FAST-LABEL: name: smax_ss_vgpr_use
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; FAST: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; FAST: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; FAST: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[COPY1]]
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; FAST: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
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; FAST: $vgpr0 = COPY [[SELECT]](s32)
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; GREEDY-LABEL: name: smax_ss_vgpr_use
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; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(sgt), [[COPY]](s32), [[COPY1]]
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; GREEDY: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
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; GREEDY: $vgpr0 = COPY [[SELECT]](s32)
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $sgpr1
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%2:_(s32) = G_SMAX %0, %1
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$vgpr0 = COPY %2
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...
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@ -1,6 +1,6 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -verify-machineinstrs -regbankselect-fast -o - %s | FileCheck -check-prefix=FAST %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -verify-machineinstrs -regbankselect-greedy -o - %s | FileCheck -check-prefix=GREEDY %s
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---
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name: smin_ss
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@ -10,11 +10,16 @@ body: |
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bb.0:
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liveins: $sgpr0, $sgpr1
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; CHECK-LABEL: name: smin_ss
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; CHECK: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY]], [[COPY2]]
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; FAST-LABEL: name: smin_ss
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; FAST: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; FAST: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; FAST: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(slt), [[COPY]](s32), [[COPY1]]
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; FAST: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
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; GREEDY-LABEL: name: smin_ss
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; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(slt), [[COPY]](s32), [[COPY1]]
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; GREEDY: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $sgpr1
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%2:_(s32) = G_SMIN %0, %1
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@ -28,10 +33,14 @@ body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; CHECK-LABEL: name: smin_sv
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY]], [[COPY1]]
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; FAST-LABEL: name: smin_sv
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; FAST: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; FAST: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; FAST: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY]], [[COPY1]]
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; GREEDY-LABEL: name: smin_sv
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; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GREEDY: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY]], [[COPY1]]
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = COPY $vgpr0
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%2:_(s32) = G_SMIN %0, %1
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@ -45,11 +54,15 @@ body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; CHECK-LABEL: name: smin_vs
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; CHECK: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY]], [[COPY2]]
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; FAST-LABEL: name: smin_vs
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; FAST: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; FAST: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; FAST: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
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; FAST: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY]], [[COPY2]]
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; GREEDY-LABEL: name: smin_vs
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; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GREEDY: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY]], [[COPY1]]
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $sgpr0
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%2:_(s32) = G_SMIN %0, %1
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@ -63,11 +76,42 @@ body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: smin_vv
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; CHECK: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY]], [[COPY1]]
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; FAST-LABEL: name: smin_vv
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; FAST: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; FAST: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; FAST: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY]], [[COPY1]]
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; GREEDY-LABEL: name: smin_vv
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; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GREEDY: [[SMIN:%[0-9]+]]:vgpr(s32) = G_SMIN [[COPY]], [[COPY1]]
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = COPY $vgpr1
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%2:_(s32) = G_SMIN %0, %1
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...
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# FIXME: This should use VGPR instruction
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---
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name: smin_ss_vgpr_use
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1
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; FAST-LABEL: name: smin_ss_vgpr_use
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; FAST: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; FAST: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; FAST: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(slt), [[COPY]](s32), [[COPY1]]
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; FAST: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
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; FAST: $vgpr0 = COPY [[SELECT]](s32)
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; GREEDY-LABEL: name: smin_ss_vgpr_use
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; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(slt), [[COPY]](s32), [[COPY1]]
|
||||
; GREEDY: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
|
||||
; GREEDY: $vgpr0 = COPY [[SELECT]](s32)
|
||||
%0:_(s32) = COPY $sgpr0
|
||||
%1:_(s32) = COPY $sgpr1
|
||||
%2:_(s32) = G_SMIN %0, %1
|
||||
$vgpr0 = COPY %2
|
||||
...
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||||
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
|
||||
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
|
||||
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -verify-machineinstrs -regbankselect-fast -o - %s | FileCheck -check-prefix=FAST %s
|
||||
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -verify-machineinstrs -regbankselect-greedy -o - %s | FileCheck -check-prefix=GREEDY %s
|
||||
|
||||
---
|
||||
name: umax_ss
|
||||
@ -10,11 +10,16 @@ body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $sgpr1
|
||||
|
||||
; CHECK-LABEL: name: umax_ss
|
||||
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
|
||||
; CHECK: [[UMAX:%[0-9]+]]:vgpr(s32) = G_UMAX [[COPY]], [[COPY2]]
|
||||
; FAST-LABEL: name: umax_ss
|
||||
; FAST: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; FAST: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; FAST: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ugt), [[COPY]](s32), [[COPY1]]
|
||||
; FAST: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
|
||||
; GREEDY-LABEL: name: umax_ss
|
||||
; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ugt), [[COPY]](s32), [[COPY1]]
|
||||
; GREEDY: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
|
||||
%0:_(s32) = COPY $sgpr0
|
||||
%1:_(s32) = COPY $sgpr1
|
||||
%2:_(s32) = G_UMAX %0, %1
|
||||
@ -28,10 +33,14 @@ body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $vgpr0
|
||||
|
||||
; CHECK-LABEL: name: umax_sv
|
||||
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; CHECK: [[UMAX:%[0-9]+]]:vgpr(s32) = G_UMAX [[COPY]], [[COPY1]]
|
||||
; FAST-LABEL: name: umax_sv
|
||||
; FAST: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; FAST: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; FAST: [[UMAX:%[0-9]+]]:vgpr(s32) = G_UMAX [[COPY]], [[COPY1]]
|
||||
; GREEDY-LABEL: name: umax_sv
|
||||
; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GREEDY: [[UMAX:%[0-9]+]]:vgpr(s32) = G_UMAX [[COPY]], [[COPY1]]
|
||||
%0:_(s32) = COPY $sgpr0
|
||||
%1:_(s32) = COPY $vgpr0
|
||||
%2:_(s32) = G_UMAX %0, %1
|
||||
@ -45,11 +54,15 @@ body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $vgpr0
|
||||
|
||||
; CHECK-LABEL: name: umax_vs
|
||||
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
|
||||
; CHECK: [[UMAX:%[0-9]+]]:vgpr(s32) = G_UMAX [[COPY]], [[COPY2]]
|
||||
; FAST-LABEL: name: umax_vs
|
||||
; FAST: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; FAST: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; FAST: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
|
||||
; FAST: [[UMAX:%[0-9]+]]:vgpr(s32) = G_UMAX [[COPY]], [[COPY2]]
|
||||
; GREEDY-LABEL: name: umax_vs
|
||||
; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GREEDY: [[UMAX:%[0-9]+]]:vgpr(s32) = G_UMAX [[COPY]], [[COPY1]]
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s32) = COPY $sgpr0
|
||||
%2:_(s32) = G_UMAX %0, %1
|
||||
@ -63,11 +76,42 @@ body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: umax_vv
|
||||
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||||
; CHECK: [[UMAX:%[0-9]+]]:vgpr(s32) = G_UMAX [[COPY]], [[COPY1]]
|
||||
; FAST-LABEL: name: umax_vv
|
||||
; FAST: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; FAST: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||||
; FAST: [[UMAX:%[0-9]+]]:vgpr(s32) = G_UMAX [[COPY]], [[COPY1]]
|
||||
; GREEDY-LABEL: name: umax_vv
|
||||
; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||||
; GREEDY: [[UMAX:%[0-9]+]]:vgpr(s32) = G_UMAX [[COPY]], [[COPY1]]
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s32) = COPY $vgpr1
|
||||
%2:_(s32) = G_UMAX %0, %1
|
||||
...
|
||||
|
||||
# FIXME: This should use VGPR instruction
|
||||
---
|
||||
name: umax_ss_vgpr_use
|
||||
legalized: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $sgpr1
|
||||
|
||||
; FAST-LABEL: name: umax_ss_vgpr_use
|
||||
; FAST: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; FAST: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; FAST: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ugt), [[COPY]](s32), [[COPY1]]
|
||||
; FAST: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
|
||||
; FAST: $vgpr0 = COPY [[SELECT]](s32)
|
||||
; GREEDY-LABEL: name: umax_ss_vgpr_use
|
||||
; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ugt), [[COPY]](s32), [[COPY1]]
|
||||
; GREEDY: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
|
||||
; GREEDY: $vgpr0 = COPY [[SELECT]](s32)
|
||||
%0:_(s32) = COPY $sgpr0
|
||||
%1:_(s32) = COPY $sgpr1
|
||||
%2:_(s32) = G_UMAX %0, %1
|
||||
$vgpr0 = COPY %2
|
||||
...
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||||
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
|
||||
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
|
||||
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -verify-machineinstrs -regbankselect-fast -o - %s | FileCheck -check-prefix=FAST %s
|
||||
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -verify-machineinstrs -regbankselect-greedy -o - %s | FileCheck -check-prefix=GREEDY %s
|
||||
|
||||
---
|
||||
name: umin_ss
|
||||
@ -10,11 +10,16 @@ body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $sgpr1
|
||||
|
||||
; CHECK-LABEL: name: umin_ss
|
||||
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
|
||||
; CHECK: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY]], [[COPY2]]
|
||||
; FAST-LABEL: name: umin_ss
|
||||
; FAST: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; FAST: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; FAST: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ult), [[COPY]](s32), [[COPY1]]
|
||||
; FAST: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
|
||||
; GREEDY-LABEL: name: umin_ss
|
||||
; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ult), [[COPY]](s32), [[COPY1]]
|
||||
; GREEDY: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
|
||||
%0:_(s32) = COPY $sgpr0
|
||||
%1:_(s32) = COPY $sgpr1
|
||||
%2:_(s32) = G_UMIN %0, %1
|
||||
@ -28,10 +33,14 @@ body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $vgpr0
|
||||
|
||||
; CHECK-LABEL: name: umin_sv
|
||||
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; CHECK: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY]], [[COPY1]]
|
||||
; FAST-LABEL: name: umin_sv
|
||||
; FAST: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; FAST: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; FAST: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY]], [[COPY1]]
|
||||
; GREEDY-LABEL: name: umin_sv
|
||||
; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GREEDY: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY]], [[COPY1]]
|
||||
%0:_(s32) = COPY $sgpr0
|
||||
%1:_(s32) = COPY $vgpr0
|
||||
%2:_(s32) = G_UMIN %0, %1
|
||||
@ -45,11 +54,15 @@ body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $vgpr0
|
||||
|
||||
; CHECK-LABEL: name: umin_vs
|
||||
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; CHECK: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
|
||||
; CHECK: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY]], [[COPY2]]
|
||||
; FAST-LABEL: name: umin_vs
|
||||
; FAST: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; FAST: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; FAST: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[COPY1]](s32)
|
||||
; FAST: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY]], [[COPY2]]
|
||||
; GREEDY-LABEL: name: umin_vs
|
||||
; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GREEDY: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY]], [[COPY1]]
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s32) = COPY $sgpr0
|
||||
%2:_(s32) = G_UMIN %0, %1
|
||||
@ -63,11 +76,42 @@ body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0, $vgpr1
|
||||
|
||||
; CHECK-LABEL: name: umin_vv
|
||||
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; CHECK: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||||
; CHECK: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY]], [[COPY1]]
|
||||
; FAST-LABEL: name: umin_vv
|
||||
; FAST: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; FAST: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||||
; FAST: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY]], [[COPY1]]
|
||||
; GREEDY-LABEL: name: umin_vv
|
||||
; GREEDY: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
||||
; GREEDY: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
|
||||
; GREEDY: [[UMIN:%[0-9]+]]:vgpr(s32) = G_UMIN [[COPY]], [[COPY1]]
|
||||
%0:_(s32) = COPY $vgpr0
|
||||
%1:_(s32) = COPY $vgpr1
|
||||
%2:_(s32) = G_UMIN %0, %1
|
||||
...
|
||||
|
||||
# FIXME: This should use VGPR instruction
|
||||
---
|
||||
name: umin_ss_vgpr_use
|
||||
legalized: true
|
||||
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $sgpr0, $sgpr1
|
||||
|
||||
; FAST-LABEL: name: umin_ss_vgpr_use
|
||||
; FAST: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; FAST: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; FAST: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ult), [[COPY]](s32), [[COPY1]]
|
||||
; FAST: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
|
||||
; FAST: $vgpr0 = COPY [[SELECT]](s32)
|
||||
; GREEDY-LABEL: name: umin_ss_vgpr_use
|
||||
; GREEDY: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
||||
; GREEDY: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
||||
; GREEDY: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(ult), [[COPY]](s32), [[COPY1]]
|
||||
; GREEDY: [[SELECT:%[0-9]+]]:sgpr(s32) = G_SELECT [[ICMP]](s1), [[COPY]], [[COPY1]]
|
||||
; GREEDY: $vgpr0 = COPY [[SELECT]](s32)
|
||||
%0:_(s32) = COPY $sgpr0
|
||||
%1:_(s32) = COPY $sgpr1
|
||||
%2:_(s32) = G_UMIN %0, %1
|
||||
$vgpr0 = COPY %2
|
||||
...
|
||||
|
||||
Loading…
Reference in New Issue
Block a user