RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-18 10:32:48 +02:00
Code Issues Projects Releases Wiki Activity

[llvm-objdump] Print memory operand addresses as regular comments

Browse Source 
The patch reuses the common code to print memory operand addresses as
instruction comments. This helps to align the comments and enables using
target-specific comment markers when `evaluateMemoryOperandAddress()` is
implemented for them.

Differential Revision: https://reviews.llvm.org/D104861
This commit is contained in:
Igor Kudrin 2021-06-28 14:24:39 +07:00
parent 7fb2900382
commit 098ea8995b
2 changed files with 19 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
test/tools/llvm-objdump/X86/disassemble-align.s
View File

@ -10,14 +10,14 @@
# Instructions are expected to be aligned if the instruction in hex is not too long.
# CHECK: 0: c3 |retq
# CHECK-NEXT: 1: 48 8b 05 56 34 12 00 |movq|0x123456(%rip), %rax # 0x12345e <.text+0x12345e>
# CHECK-NEXT: 1: 48 8b 05 56 34 12 00 |movq|0x123456(%rip), %rax # 0x12345e <.text+0x12345e>
# CHECK-NEXT: 8: 48 b8 54 55 55 55 55 55 55 55|movabsq|$0x5555555555555554, %rax # imm = 0x5555555555555554
# CHECK-NEXT: 12: 8f ea 00 12 4c 02 40 00 00 00 00 |lwpval|$0x0, 0x40(%rdx,%rax), %r15d
# CHECK-NEXT: 1d: 8f ea 00 12 04 25 f0 1c f0 1c 00 00 00 00 |lwpins|$0x0, 0x1cf01cf0, %r15d
# CHECK-NEXT: 2b: ff ff |<unknown>
# NORAW: 0: |retq
# NORAW-NEXT: 1: |movq|0x123456(%rip), %rax # 0x12345e <.text+0x12345e>
# NORAW-NEXT: 1: |movq|0x123456(%rip), %rax # 0x12345e <.text+0x12345e>
# NORAW-NEXT: 8: |movabsq|$0x5555555555555554, %rax # imm = 0x5555555555555554
# NORAW-NEXT: 12: |lwpval|$0x0, 0x40(%rdx,%rax), %r15d
# NORAW-NEXT: 1d: |lwpins|$0x0, 0x1cf01cf0, %r15d

25
tools/llvm-objdump/llvm-objdump.cpp
View File

@ -1433,6 +1433,8 @@ static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
// address (jump target or memory operand address) and print it on the
// right of the instruction.
if (Disassembled && MIA) {
// Branch targets are printed just after the instructions.
llvm::raw_ostream *TargetOS = &FOS;
uint64_t Target;
bool PrintTarget =
MIA->evaluateBranch(Inst, SectionAddr + Index, Size, Target);
@ -1443,8 +1445,11 @@ static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
Target = *MaybeTarget;
PrintTarget = true;
// Do not print real address when symbolizing.
if (!SymbolizeOperands)
FOS << " # 0x" << Twine::utohexstr(Target);
if (!SymbolizeOperands) {
// Memory operand addresses are printed as comments.
TargetOS = &CommentStream;
*TargetOS << "0x" << Twine::utohexstr(Target);
}
}
if (PrintTarget) {
// In a relocatable object, the target's section must reside in
@ -1503,22 +1508,26 @@ static void disassembleObject(const Target *TheTarget, const ObjectFile *Obj,
if (Demangle)
TargetName = demangle(TargetName);
FOS << " <";
*TargetOS << " <";
if (!Disp) {
// Always Print the binary symbol precisely corresponding to
// the target address.
FOS << TargetName;
*TargetOS << TargetName;
} else if (!LabelAvailable) {
// Always Print the binary symbol plus an offset if there's no
// local label corresponding to the target address.
FOS << TargetName << "+0x" << Twine::utohexstr(Disp);
*TargetOS << TargetName << "+0x" << Twine::utohexstr(Disp);
} else {
FOS << AllLabels[Target];
*TargetOS << AllLabels[Target];
}
FOS << ">";
*TargetOS << ">";
} else if (LabelAvailable) {
FOS << " <" << AllLabels[Target] << ">";
*TargetOS << " <" << AllLabels[Target] << ">";
}
// By convention, each record in the comment stream should be
// terminated.
if (TargetOS == &CommentStream)
*TargetOS << "\n";
}
}
}