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[ARM] Fix bugs introduced by the fp64/d32 rework.

Change D60691 caused some knock-on failures that weren't caught by the
existing tests. Firstly, selecting a CPU that should have had a
restricted FPU (e.g. `-mcpu=cortex-m4`, which should have 16 d-regs
and no double precision) could give the unrestricted version, because
`ARM::getFPUFeatures` returned a list of features including subtracted
ones (here `-fp64`,`-d32`), but `ARMTargetInfo::initFeatureMap` threw
away all the ones that didn't start with `+`. Secondly, the
preprocessor macros didn't reliably match the actual compilation
settings: for example, `-mfpu=softvfp` could still set `__ARM_FP` as
if hardware FP was available, because the list of features on the cc1
command line would include things like `+vfp4`,`-vfp4d16` and clang
didn't realise that one of those cancelled out the other.

I've fixed both of these issues by rewriting `ARM::getFPUFeatures` so
that it returns a list that enables every FP-related feature
compatible with the selected FPU and disables every feature not
compatible, which is more verbose but means clang doesn't have to
understand the dependency relationships between the backend features.
Meanwhile, `ARMTargetInfo::handleTargetFeatures` is testing for all
the various forms of the FP feature names, so that it won't miss cases
where it should have set `HW_FP` to feed into feature test macros.

That in turn caused an ordering problem when handling `-mcpu=foo+bar`
together with `-mfpu=something_that_turns_off_bar`. To fix that, I've
arranged that the `+bar` suffixes on the end of `-mcpu` and `-march`
cause feature names to be put into a separate vector which is
concatenated after the output of `getFPUFeatures`.

Another side effect of all this is to fix a bug where `clang -target
armv8-eabi` by itself would fail to set `__ARM_FEATURE_FMA`, even
though `armv8` (aka Arm v8-A) implies FP-Armv8 which has FMA. That was
because `HW_FP` was being set to a value including only the `FPARMV8`
bit, but that feature test macro was testing only the `VFP4FPU` bit.
Now `HW_FP` ends up with all the bits set, so it gives the right
answer.

Changes to tests included in this patch:

* `arm-target-features.c`: I had to change basically all the expected
  results. (The Cortex-M4 test in there should function as a
  regression test for the accidental double-precision bug.)
* `arm-mfpu.c`, `armv8.1m.main.c`: switched to using `CHECK-DAG`
  everywhere so that those tests are no longer sensitive to the order
  of cc1 feature options on the command line.
* `arm-acle-6.5.c`: been updated to expect the right answer to that
  FMA test.
* `Preprocessor/arm-target-features.c`: added a regression test for
  the `mfpu=softvfp` issue.

Reviewers: SjoerdMeijer, dmgreen, ostannard, samparker, JamesNagurne

Reviewed By: ostannard

Subscribers: srhines, javed.absar, kristof.beyls, hiraditya, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D62998

llvm-svn: 362791
This commit is contained in:
Simon Tatham 2019-06-07 12:42:54 +00:00
parent 723755fecc
commit 09e0388267

View File

@ -162,87 +162,63 @@ bool ARM::getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features) {
if (FPUKind >= FK_LAST || FPUKind == FK_INVALID)
return false;
// FPU version subtarget features are inclusive of lower-numbered ones, so
// enable the one corresponding to this version and disable all that are
// higher. We also have to make sure to disable fp16 when vfp4 is disabled,
// as +vfp4 implies +fp16 but -vfp4 does not imply -fp16.
switch (FPUNames[FPUKind].FPUVer) {
case FPUVersion::VFPV5_FULLFP16:
Features.push_back("+fp-armv8");
Features.push_back("+fullfp16");
break;
case FPUVersion::VFPV5:
Features.push_back("+fp-armv8");
break;
case FPUVersion::VFPV4:
Features.push_back("+vfp4");
Features.push_back("-fp-armv8");
break;
case FPUVersion::VFPV3_FP16:
Features.push_back("+vfp3");
Features.push_back("+fp16");
Features.push_back("-vfp4");
Features.push_back("-fp-armv8");
break;
case FPUVersion::VFPV3:
Features.push_back("+vfp3");
Features.push_back("-fp16");
Features.push_back("-vfp4");
Features.push_back("-fp-armv8");
break;
case FPUVersion::VFPV2:
Features.push_back("+vfp2");
Features.push_back("-vfp3");
Features.push_back("-fp16");
Features.push_back("-vfp4");
Features.push_back("-fp-armv8");
break;
case FPUVersion::NONE:
Features.push_back("-fpregs");
Features.push_back("-vfp2");
Features.push_back("-vfp3");
Features.push_back("-fp16");
Features.push_back("-vfp4");
Features.push_back("-fp-armv8");
break;
static const struct FPUFeatureNameInfo {
const char *PlusName, *MinusName;
FPUVersion MinVersion;
FPURestriction MaxRestriction;
} FPUFeatureInfoList[] = {
// We have to specify the + and - versions of the name in full so
// that we can return them as static StringRefs.
//
// Also, the SubtargetFeatures ending in just "sp" are listed here
// under FPURestriction::None, which is the only FPURestriction in
// which they would be valid (since FPURestriction::SP doesn't
// exist).
{"+fpregs", "-fpregs", FPUVersion::VFPV2, FPURestriction::SP_D16},
{"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::None},
{"+vfp2d16", "-vfp2d16", FPUVersion::VFPV2, FPURestriction::D16},
{"+vfp2d16sp", "-vfp2d16sp", FPUVersion::VFPV2, FPURestriction::SP_D16},
{"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::None},
{"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None},
{"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16},
{"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16},
{"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None},
{"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16},
{"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None},
{"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16},
{"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16},
{"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None},
{"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None},
{"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16},
{"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16},
{"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None},
{"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16},
{"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16},
{"+d32", "-d32", FPUVersion::VFPV2, FPURestriction::None},
};
for (const auto &Info: FPUFeatureInfoList) {
if (FPUNames[FPUKind].FPUVer >= Info.MinVersion &&
FPUNames[FPUKind].Restriction <= Info.MaxRestriction)
Features.push_back(Info.PlusName);
else
Features.push_back(Info.MinusName);
}
// fp64 and d32 subtarget features are independent of each other, so we
// must disable/enable both.
if (FPUKind == FK_NONE) {
Features.push_back("-fp64");
Features.push_back("-d32");
} else {
switch (FPUNames[FPUKind].Restriction) {
case FPURestriction::SP_D16:
Features.push_back("-fp64");
Features.push_back("-d32");
break;
case FPURestriction::D16:
Features.push_back("+fp64");
Features.push_back("-d32");
break;
case FPURestriction::None:
Features.push_back("+fp64");
Features.push_back("+d32");
break;
}
}
static const struct NeonFeatureNameInfo {
const char *PlusName, *MinusName;
NeonSupportLevel MinSupportLevel;
} NeonFeatureInfoList[] = {
{"+neon", "-neon", NeonSupportLevel::Neon},
{"+crypto", "-crypto", NeonSupportLevel::Crypto},
};
// crypto includes neon, so we handle this similarly to FPU version.
switch (FPUNames[FPUKind].NeonSupport) {
case NeonSupportLevel::Crypto:
Features.push_back("+neon");
Features.push_back("+crypto");
break;
case NeonSupportLevel::Neon:
Features.push_back("+neon");
Features.push_back("-crypto");
break;
case NeonSupportLevel::None:
Features.push_back("-neon");
Features.push_back("-crypto");
break;
for (const auto &Info: NeonFeatureInfoList) {
if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel)
Features.push_back(Info.PlusName);
else
Features.push_back(Info.MinusName);
}
return true;