RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-31 12:41:49 +01:00
Code Issues Projects Releases Wiki Activity

AMDGPU/GlobalISel: Fix RegBankSelect for G_FRINT and G_FCEIL

Browse Source 
llvm-svn: 371991
This commit is contained in:
Matt Arsenault 2019-09-16 14:14:37 +00:00
parent 72c1531d35
commit 09f6dddd2d
3 changed files with 64 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
View File

@ -1783,6 +1783,8 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
case AMDGPU::G_FMAD:
case AMDGPU::G_FSQRT:
case AMDGPU::G_FFLOOR:
case AMDGPU::G_FCEIL:
case AMDGPU::G_FRINT:
case AMDGPU::G_SITOFP:
case AMDGPU::G_UITOFP:
case AMDGPU::G_FPTRUNC:

31
test/CodeGen/AMDGPU/GlobalISel/regbankselect-fceil.mir Normal file
View File

@ -0,0 +1,31 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
---
name: fceil_s
legalized: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: fceil_s
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[FCEIL_:%[0-9]+]]:vgpr(s32) = G_FCEIL [[COPY]]
%0:_(s32) = COPY $sgpr0
%1:_(s32) = G_FCEIL %0
...
---
name: fceil_v
legalized: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: fceil_v
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[FCEIL_:%[0-9]+]]:vgpr(s32) = G_FCEIL [[COPY]]
%0:_(s32) = COPY $vgpr0
%1:_(s32) = G_FCEIL %0
...

31
test/CodeGen/AMDGPU/GlobalISel/regbankselect-frint.mir Normal file
View File

@ -0,0 +1,31 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
---
name: frint_s
legalized: true
body: |
bb.0:
liveins: $sgpr0
; CHECK-LABEL: name: frint_s
; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
; CHECK: [[FRINT_:%[0-9]+]]:vgpr(s32) = G_FRINT [[COPY]]
%0:_(s32) = COPY $sgpr0
%1:_(s32) = G_FRINT %0
...
---
name: frint_v
legalized: true
body: |
bb.0:
liveins: $vgpr0
; CHECK-LABEL: name: frint_v
; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
; CHECK: [[FRINT_:%[0-9]+]]:vgpr(s32) = G_FRINT [[COPY]]
%0:_(s32) = COPY $vgpr0
%1:_(s32) = G_FRINT %0
...