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[CodeGen] Print constant pool index operands as %const.0 + 8 in both MIR and debug output
Work towards the unification of MIR and debug output by printing `%const.0 + 8` instead of `<cp#0+8>` and `%const.0 - 8` instead of `<cp#0-8>`. Only debug syntax is affected. Differential Revision: https://reviews.llvm.org/D41116 llvm-svn: 320564
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@ -549,6 +549,53 @@ lower bits from the 32-bit virtual register 0 to the 8-bit virtual register 1:
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The names of the subregister indices are target specific, and are typically
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defined in the target's ``*RegisterInfo.td`` file.
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Constant Pool Indices
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^^^^^^^^^^^^^^^^^^^^^
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A constant pool index (CPI) operand is printed using its index in the
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function's ``MachineConstantPool`` and an offset.
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For example, a CPI with the index 1 and offset 8:
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.. code-block:: text
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%1:gr64 = MOV64ri %const.1 + 8
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For a CPI with the index 0 and offset -12:
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.. code-block:: text
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%1:gr64 = MOV64ri %const.0 - 12
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A constant pool entry is bound to a LLVM IR ``Constant`` or a target-specific
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``MachineConstantPoolValue``. When serializing all the function's constants the
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following format is used:
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.. code-block:: text
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constants:
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- id: <index>
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value: <value>
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alignment: <alignment>
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isTargetSpecific: <target-specific>
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where ``<index>`` is a 32-bit unsigned integer, ``<value>`` is a `LLVM IR Constant
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<https://www.llvm.org/docs/LangRef.html#constants>`_, alignment is a 32-bit
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unsigned integer, and ``<target-specific>`` is either true or false.
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Example:
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.. code-block:: text
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constants:
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- id: 0
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value: 'double 3.250000e+00'
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alignment: 8
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- id: 1
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value: 'g-(LPC0+8)'
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alignment: 4
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isTargetSpecific: true
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Global Value Operands
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^^^^^^^^^^^^^^^^^^^^^
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@ -578,8 +625,6 @@ the '@' prefix, like in the following examples: ``@0``, ``@989``.
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.. TODO: Describe the frame information YAML mapping.
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.. TODO: Describe the syntax of the stack object machine operands and their
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YAML definitions.
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.. TODO: Describe the syntax of the constant pool machine operands and their
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YAML definitions.
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.. TODO: Describe the syntax of the jump table machine operands and their
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YAML definitions.
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.. TODO: Describe the syntax of the block address machine operands.
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@ -862,7 +862,8 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
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LLVM_FALLTHROUGH;
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case MachineOperand::MO_Register:
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case MachineOperand::MO_CImmediate:
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case MachineOperand::MO_MachineBasicBlock: {
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case MachineOperand::MO_MachineBasicBlock:
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case MachineOperand::MO_ConstantPoolIndex: {
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unsigned TiedOperandIdx = 0;
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if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
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TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
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@ -877,10 +878,6 @@ void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
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case MachineOperand::MO_FrameIndex:
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printStackObjectReference(Op.getIndex());
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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OS << "%const." << Op.getIndex();
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printOffset(Op.getOffset());
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break;
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case MachineOperand::MO_TargetIndex:
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OS << "target-index(";
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if (const auto *Name =
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@ -376,6 +376,16 @@ static void tryToGetTargetInfo(const MachineOperand &MO,
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}
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}
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static void printOffset(raw_ostream &OS, int64_t Offset) {
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if (Offset == 0)
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return;
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if (Offset < 0) {
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OS << " - " << -Offset;
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return;
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}
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OS << " + " << Offset;
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}
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void MachineOperand::printSubregIdx(raw_ostream &OS, uint64_t Index,
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const TargetRegisterInfo *TRI) {
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OS << "%subreg.";
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@ -486,10 +496,8 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
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OS << "<fi#" << getIndex() << '>';
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break;
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case MachineOperand::MO_ConstantPoolIndex:
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OS << "<cp#" << getIndex();
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if (getOffset())
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OS << "+" << getOffset();
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OS << '>';
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OS << "%const." << getIndex();
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printOffset(OS, getOffset());
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break;
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case MachineOperand::MO_TargetIndex:
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OS << "<ti#" << getIndex();
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@ -5,7 +5,7 @@ target triple = "thumbv7-apple-ios"
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; The vector %v2 is built like this:
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;
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; %6:ssub_1 = ...
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; %6:ssub_0 = VLDRS <cp#0>, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] DPR_VFP2:%6
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; %6:ssub_0 = VLDRS %const.0, 0, pred:14, pred:%noreg; mem:LD4[ConstantPool] DPR_VFP2:%6
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;
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; When %6 spills, the VLDRS constant pool load cannot be rematerialized
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; since it implicitly reads the ssub_1 sub-register.
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@ -31,7 +31,7 @@ define void @f1(float %x, <2 x float>* %p) {
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; because the bits are undef, we should rematerialize. The vector is now built
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; like this:
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;
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; %2:ssub_0 = VLDRS <cp#0>, 0, pred:14, pred:%noreg, implicit-def %2; mem:LD4[ConstantPool]
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; %2:ssub_0 = VLDRS %const.0, 0, pred:14, pred:%noreg, implicit-def %2; mem:LD4[ConstantPool]
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;
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; The extra <imp-def> operand indicates that the instruction fully defines the
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; virtual register. It doesn't read the old value.
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@ -6,7 +6,7 @@ target triple = "x86_64-apple-darwin"
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;%bb.5: derived from LLVM BB %bb10
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; Predecessors according to CFG: %bb.4 %bb.5
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; %reg1024 = MOV_Fp8080 %reg1034
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; %reg1025 = MUL_Fp80m32 %reg1024, %rip, 1, %reg0, <cp#0>, %reg0; mem:LD4[ConstantPool]
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; %reg1025 = MUL_Fp80m32 %reg1024, %rip, 1, %reg0, %const.0, %reg0; mem:LD4[ConstantPool]
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; %reg1034 = MOV_Fp8080 %reg1025
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; FP_REG_KILL implicit-def %fp0, implicit-def %fp1, implicit-def %fp2, implicit-def %fp3, implicit-def %fp4, implicit-def %fp5, implicit-def %fp6
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; JMP_4 <%bb.5>
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@ -17,7 +17,7 @@ target triple = "x86_64-apple-darwin"
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; Predecessors according to CFG: %bb.4 %bb.5
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; %fp0 = LD_Fp80m <fi#3>, 1, %reg0, 0, %reg0; mem:LD10[FixedStack3](align=4)
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; %fp1 = MOV_Fp8080 killed %fp0
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; %fp2 = MUL_Fp80m32 %fp1, %rip, 1, %reg0, <cp#0>, %reg0; mem:LD4[ConstantPool]
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; %fp2 = MUL_Fp80m32 %fp1, %rip, 1, %reg0, %const.0, %reg0; mem:LD4[ConstantPool]
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; %fp0 = MOV_Fp8080 %fp2
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; ST_FpP80m <fi#3>, 1, %reg0, 0, %reg0, killed %fp0; mem:ST10[FixedStack3](align=4)
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; ST_FpP80m <fi#4>, 1, %reg0, 0, %reg0, killed %fp1; mem:ST10[FixedStack4](align=4)
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@ -119,4 +119,36 @@ TEST(MachineOperandTest, PrintSubRegIndex) {
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ASSERT_TRUE(OS.str() == "%subreg.3");
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}
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TEST(MachineOperandTest, PrintCPI) {
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// Create a MachineOperand with a constant pool index and print it.
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MachineOperand MO = MachineOperand::CreateCPI(0, 8);
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// Checking some preconditions on the newly created
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// MachineOperand.
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ASSERT_TRUE(MO.isCPI());
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ASSERT_TRUE(MO.getIndex() == 0);
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ASSERT_TRUE(MO.getOffset() == 8);
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// Print a MachineOperand containing a constant pool index and a positive
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// offset.
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std::string str;
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{
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raw_string_ostream OS(str);
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MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr);
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ASSERT_TRUE(OS.str() == "%const.0 + 8");
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}
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str.clear();
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MO.setOffset(-12);
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// Print a MachineOperand containing a constant pool index and a negative
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// offset.
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{
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raw_string_ostream OS(str);
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MO.print(OS, /*TRI=*/nullptr, /*IntrinsicInfo=*/nullptr);
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ASSERT_TRUE(OS.str() == "%const.0 - 12");
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}
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}
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} // end namespace
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