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Fix order of operands on a store from reg to [reg+offset].
llvm-svn: 4857
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@ -31,8 +31,8 @@ X86RegisterInfo::storeReg2RegOffset(MachineBasicBlock *MBB,
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unsigned ImmOffset, unsigned dataSize)
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const
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{
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MachineInstr *MI = addRegOffset(BuildMI(X86::MOVrm32, 5).addReg(SrcReg),
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DestReg, ImmOffset);
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MachineInstr *MI = addRegOffset(BuildMI(X86::MOVrm32, 5),
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DestReg, ImmOffset).addReg(SrcReg);
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return ++(MBB->insert(MBBI, MI));
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}
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