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[NFCI][CostModel] Unify FNeg cost
Enable TTIImpl::getUserCost to handle FNeg so that getInstructionThroughput can call that instead. This means we can remove the code in the AMDGPU backend too. Differential Revision: https://reviews.llvm.org/D81635
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@ -861,11 +861,14 @@ public:
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case Instruction::AShr:
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case Instruction::AShr:
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case Instruction::And:
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Or:
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case Instruction::Xor: {
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case Instruction::Xor:
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TargetTransformInfo::OperandValueKind Op1VK, Op2VK;
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case Instruction::FNeg: {
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TargetTransformInfo::OperandValueProperties Op1VP, Op2VP;
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TTI::OperandValueProperties Op1VP = TTI::OP_None;
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Op1VK = TTI::getOperandInfo(U->getOperand(0), Op1VP);
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TTI::OperandValueProperties Op2VP = TTI::OP_None;
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Op2VK = TTI::getOperandInfo(U->getOperand(1), Op2VP);
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TTI::OperandValueKind Op1VK =
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TTI::getOperandInfo(U->getOperand(0), Op1VP);
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TTI::OperandValueKind Op2VK = Opcode != Instruction::FNeg ?
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TTI::getOperandInfo(U->getOperand(1), Op2VP) : TTI::OK_AnyValue;
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SmallVector<const Value *, 2> Operands(U->operand_values());
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SmallVector<const Value *, 2> Operands(U->operand_values());
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return TargetTTI->getArithmeticInstrCost(Opcode, Ty, CostKind,
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return TargetTTI->getArithmeticInstrCost(Opcode, Ty, CostKind,
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Op1VK, Op2VK,
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Op1VK, Op2VK,
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@ -1250,18 +1250,8 @@ int TargetTransformInfo::getInstructionThroughput(const Instruction *I) const {
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case Instruction::And:
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case Instruction::And:
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case Instruction::Or:
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case Instruction::Or:
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case Instruction::Xor:
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case Instruction::Xor:
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case Instruction::FNeg:
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return getUserCost(I, CostKind);
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return getUserCost(I, CostKind);
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case Instruction::FNeg: {
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TargetTransformInfo::OperandValueKind Op1VK, Op2VK;
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TargetTransformInfo::OperandValueProperties Op1VP, Op2VP;
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Op1VK = getOperandInfo(I->getOperand(0), Op1VP);
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Op2VK = OK_AnyValue;
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Op2VP = OP_None;
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SmallVector<const Value *, 2> Operands(I->operand_values());
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return getArithmeticInstrCost(I->getOpcode(), I->getType(), CostKind,
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Op1VK, Op2VK,
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Op1VP, Op2VP, Operands, I);
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}
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case Instruction::Select:
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case Instruction::Select:
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case Instruction::ICmp:
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case Instruction::ICmp:
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case Instruction::FCmp:
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case Instruction::FCmp:
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@ -983,26 +983,6 @@ void GCNTTIImpl::getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
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CommonTTI.getUnrollingPreferences(L, SE, UP);
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CommonTTI.getUnrollingPreferences(L, SE, UP);
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}
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}
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unsigned
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GCNTTIImpl::getUserCost(const User *U, ArrayRef<const Value *> Operands,
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TTI::TargetCostKind CostKind) {
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const Instruction *I = dyn_cast<Instruction>(U);
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if (!I)
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return BaseT::getUserCost(U, Operands, CostKind);
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// Estimate different operations to be optimized out
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switch (I->getOpcode()) {
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case Instruction::FNeg:
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return getArithmeticInstrCost(I->getOpcode(), I->getType(), CostKind,
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TTI::OK_AnyValue, TTI::OK_AnyValue,
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TTI::OP_None, TTI::OP_None, Operands, I);
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default:
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break;
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}
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return BaseT::getUserCost(U, Operands, CostKind);
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}
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unsigned R600TTIImpl::getHardwareNumberOfRegisters(bool Vec) const {
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unsigned R600TTIImpl::getHardwareNumberOfRegisters(bool Vec) const {
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return 4 * 128; // XXX - 4 channels. Should these count as vector instead?
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return 4 * 128; // XXX - 4 channels. Should these count as vector instead?
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}
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}
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@ -237,9 +237,6 @@ public:
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int getMinMaxReductionCost(
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int getMinMaxReductionCost(
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VectorType *Ty, VectorType *CondTy, bool IsPairwiseForm, bool IsUnsigned,
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VectorType *Ty, VectorType *CondTy, bool IsPairwiseForm, bool IsUnsigned,
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TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput);
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TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput);
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unsigned getUserCost(const User *U, ArrayRef<const Value *> Operands,
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TTI::TargetCostKind CostKind);
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};
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};
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class R600TTIImpl final : public BasicTTIImplBase<R600TTIImpl> {
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class R600TTIImpl final : public BasicTTIImplBase<R600TTIImpl> {
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