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update some notes slightly
llvm-svn: 89913
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@ -220,7 +220,7 @@ so cool to turn it into something like:
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... which would only do one 32-bit XOR per loop iteration instead of two.
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It would also be nice to recognize the reg->size doesn't alias reg->node[i], but
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alas.
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this requires TBAA.
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//===---------------------------------------------------------------------===//
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@ -280,6 +280,9 @@ unsigned int popcount(unsigned int input) {
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return count;
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}
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This is a form of idiom recognition for loops, the same thing that could be
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useful for recognizing memset/memcpy.
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//===---------------------------------------------------------------------===//
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These should turn into single 16-bit (unaligned?) loads on little/big endian
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@ -343,7 +346,7 @@ PHI Slicing could be extended to do this.
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//===---------------------------------------------------------------------===//
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LSR should know what GPR types a target has. This code:
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LSR should know what GPR types a target has from TargetData. This code:
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volatile short X, Y; // globals
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@ -369,7 +372,6 @@ LBB1_2:
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LSR should reuse the "+" IV for the exit test.
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//===---------------------------------------------------------------------===//
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Tail call elim should be more aggressive, checking to see if the call is
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