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[x86] add/regenerate complete checks; NFC
llvm-svn: 312502
This commit is contained in:
Sanjay Patel
parent
c0cf59d6e5
commit
0bba6186c5
@ -1,12 +1,14 @@
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; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-pc-win64 | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
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; CHECK: multiple_stores_on_chain
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; CHECK: movabsq
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; CHECK: movq
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; CHECK: movabsq
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; CHECK: movq
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; CHECK: ret
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define void @multiple_stores_on_chain(i16 * %A) {
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; CHECK-LABEL: multiple_stores_on_chain:
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; CHECK: # BB#0: # %entry
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; CHECK-NEXT: movabsq $844433520132096, %rax # imm = 0x3000200010000
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; CHECK-NEXT: movq %rax, (%rdi)
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; CHECK-NEXT: movabsq $1970350607106052, %rax # imm = 0x7000600050004
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; CHECK-NEXT: movq %rax, 8(%rdi)
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; CHECK-NEXT: retq
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entry:
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%a0 = getelementptr inbounds i16, i16* %A, i64 0
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%a1 = getelementptr inbounds i16, i16* %A, i64 1
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@ -1,4 +1,5 @@
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; RUN: llc < %s -mcpu=core-avx-i -mtriple=i386-unknown-linux-gnu -mattr=+avx,+popcnt,+cmov
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mcpu=core-avx-i -mtriple=i386-unknown-linux-gnu -mattr=+avx,+popcnt,+cmov | FileCheck %s
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; Make sure that we don't introduce illegal build_vector dag nodes
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; when trying to fold a sign_extend of a constant build_vector.
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@ -6,6 +7,12 @@
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; due to an illegal build_vector of type MVT::v4i64.
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define <4 x i64> @foo(<4 x i64> %A) {
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; CHECK-LABEL: foo:
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; CHECK: # BB#0:
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; CHECK-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
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; CHECK-NEXT: vmovdqa %xmm1, %xmm1
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; CHECK-NEXT: vandps %ymm0, %ymm1, %ymm0
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; CHECK-NEXT: retl
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%1 = select <4 x i1> <i1 true, i1 true, i1 false, i1 false>, <4 x i64> %A, <4 x i64><i64 undef, i64 undef, i64 0, i64 0>
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ret <4 x i64> %1
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}
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@ -1,96 +1,155 @@
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; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s -check-prefix=X64
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
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; DAGCombiner crashes during sext folding
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define <2 x i256> @test_sext1() {
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; X32-LABEL: test_sext1:
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; X32: # BB#0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl $-1, 60(%eax)
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; X32-NEXT: movl $-1, 56(%eax)
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; X32-NEXT: movl $-1, 52(%eax)
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; X32-NEXT: movl $-1, 48(%eax)
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; X32-NEXT: movl $-1, 44(%eax)
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; X32-NEXT: movl $-1, 40(%eax)
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; X32-NEXT: movl $-1, 36(%eax)
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; X32-NEXT: movl $-99, 32(%eax)
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; X32-NEXT: movl $0, 28(%eax)
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; X32-NEXT: movl $0, 24(%eax)
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; X32-NEXT: movl $0, 20(%eax)
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; X32-NEXT: movl $0, 16(%eax)
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; X32-NEXT: movl $0, 12(%eax)
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; X32-NEXT: movl $0, 8(%eax)
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; X32-NEXT: movl $0, 4(%eax)
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; X32-NEXT: movl $0, (%eax)
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; X32-NEXT: retl $4
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;
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; X64-LABEL: test_sext1:
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; X64: # BB#0:
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, 16(%rdi)
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; X64-NEXT: movaps %xmm0, (%rdi)
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; X64-NEXT: movq $-1, 56(%rdi)
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; X64-NEXT: movq $-1, 48(%rdi)
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; X64-NEXT: movq $-1, 40(%rdi)
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; X64-NEXT: movq $-99, 32(%rdi)
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%Se = sext <2 x i8> <i8 -100, i8 -99> to <2 x i256>
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%Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
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ret <2 x i256> %Shuff
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; X64-LABEL: test_sext1
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; X64: movq $-1
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; X64-NEXT: movq $-1
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; X64-NEXT: movq $-1
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; X64-NEXT: movq $-99
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; X32-LABEL: test_sext1
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; X32: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-99
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}
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define <2 x i256> @test_sext2() {
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; X32-LABEL: test_sext2:
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; X32: # BB#0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl $-1, 60(%eax)
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; X32-NEXT: movl $-1, 56(%eax)
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; X32-NEXT: movl $-1, 52(%eax)
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; X32-NEXT: movl $-1, 48(%eax)
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; X32-NEXT: movl $-1, 44(%eax)
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; X32-NEXT: movl $-1, 40(%eax)
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; X32-NEXT: movl $-1, 36(%eax)
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; X32-NEXT: movl $-1999, 32(%eax) # imm = 0xF831
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; X32-NEXT: movl $0, 28(%eax)
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; X32-NEXT: movl $0, 24(%eax)
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; X32-NEXT: movl $0, 20(%eax)
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; X32-NEXT: movl $0, 16(%eax)
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; X32-NEXT: movl $0, 12(%eax)
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; X32-NEXT: movl $0, 8(%eax)
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; X32-NEXT: movl $0, 4(%eax)
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; X32-NEXT: movl $0, (%eax)
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; X32-NEXT: retl $4
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;
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; X64-LABEL: test_sext2:
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; X64: # BB#0:
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, 16(%rdi)
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; X64-NEXT: movaps %xmm0, (%rdi)
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; X64-NEXT: movq $-1, 56(%rdi)
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; X64-NEXT: movq $-1, 48(%rdi)
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; X64-NEXT: movq $-1, 40(%rdi)
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; X64-NEXT: movq $-1999, 32(%rdi) # imm = 0xF831
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%Se = sext <2 x i128> <i128 -2000, i128 -1999> to <2 x i256>
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%Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
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ret <2 x i256> %Shuff
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; X64-LABEL: test_sext2
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; X64: movq $-1
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; X64-NEXT: movq $-1
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; X64-NEXT: movq $-1
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; X64-NEXT: movq $-1999
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; X32-LABEL: test_sext2
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; X32: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1999
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}
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define <2 x i256> @test_zext1() {
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; X32-LABEL: test_zext1:
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; X32: # BB#0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl $0, 60(%eax)
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; X32-NEXT: movl $0, 56(%eax)
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; X32-NEXT: movl $0, 52(%eax)
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; X32-NEXT: movl $0, 48(%eax)
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; X32-NEXT: movl $0, 44(%eax)
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; X32-NEXT: movl $0, 40(%eax)
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; X32-NEXT: movl $0, 36(%eax)
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; X32-NEXT: movl $254, 32(%eax)
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; X32-NEXT: movl $0, 28(%eax)
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; X32-NEXT: movl $0, 24(%eax)
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; X32-NEXT: movl $0, 20(%eax)
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; X32-NEXT: movl $0, 16(%eax)
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; X32-NEXT: movl $0, 12(%eax)
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; X32-NEXT: movl $0, 8(%eax)
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; X32-NEXT: movl $0, 4(%eax)
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; X32-NEXT: movl $0, (%eax)
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; X32-NEXT: retl $4
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;
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; X64-LABEL: test_zext1:
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; X64: # BB#0:
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, 48(%rdi)
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; X64-NEXT: movaps %xmm0, 16(%rdi)
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; X64-NEXT: movaps %xmm0, (%rdi)
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; X64-NEXT: movq $0, 40(%rdi)
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; X64-NEXT: movq $254, 32(%rdi)
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%Se = zext <2 x i8> <i8 -1, i8 -2> to <2 x i256>
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%Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
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ret <2 x i256> %Shuff
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; X64-LABEL: test_zext1
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; X64: xorps %xmm0, %xmm0
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; X64: movaps %xmm0
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; X64: movaps %xmm0
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; X64: movaps %xmm0
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; X64-NEXT: movq $0
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; X64-NEXT: movq $254
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; X32-LABEL: test_zext1
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; X32: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $254
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}
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define <2 x i256> @test_zext2() {
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; X32-LABEL: test_zext2:
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; X32: # BB#0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movl $0, 60(%eax)
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; X32-NEXT: movl $0, 56(%eax)
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; X32-NEXT: movl $0, 52(%eax)
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; X32-NEXT: movl $0, 48(%eax)
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; X32-NEXT: movl $-1, 44(%eax)
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; X32-NEXT: movl $-1, 40(%eax)
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; X32-NEXT: movl $-1, 36(%eax)
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; X32-NEXT: movl $-2, 32(%eax)
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; X32-NEXT: movl $0, 28(%eax)
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; X32-NEXT: movl $0, 24(%eax)
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; X32-NEXT: movl $0, 20(%eax)
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; X32-NEXT: movl $0, 16(%eax)
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; X32-NEXT: movl $0, 12(%eax)
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; X32-NEXT: movl $0, 8(%eax)
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; X32-NEXT: movl $0, 4(%eax)
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; X32-NEXT: movl $0, (%eax)
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; X32-NEXT: retl $4
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;
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; X64-LABEL: test_zext2:
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; X64: # BB#0:
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, 48(%rdi)
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; X64-NEXT: movaps %xmm0, 16(%rdi)
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; X64-NEXT: movaps %xmm0, (%rdi)
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; X64-NEXT: movq $-1, 40(%rdi)
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; X64-NEXT: movq $-2, 32(%rdi)
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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%Se = zext <2 x i128> <i128 -1, i128 -2> to <2 x i256>
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%Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
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ret <2 x i256> %Shuff
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; X64-LABEL: test_zext2
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; X64: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0
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; X64-NEXT: movaps %xmm0
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; X64-NEXT: movaps %xmm0
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; X64-NEXT: movq $-1
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; X64-NEXT: movq $-2
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; X32-LABEL: test_zext2
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; X32: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-2
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}
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