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[CostModel][X86] Pull out X86/X64 scalar int arithmetric costs from SSE tables. NFCI.
These aren't dependent on any SSE level (and don't tend to get quicker either).
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@ -963,7 +963,22 @@ InstructionCost X86TTIImpl::getArithmeticInstrCost(
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{ ISD::FSUB, MVT::f32, 1 }, // Pentium III from http://www.agner.org/
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{ ISD::FSUB, MVT::v4f32, 2 }, // Pentium III from http://www.agner.org/
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};
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if (ST->hasSSE1())
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if (const auto *Entry = CostTableLookup(SSE1CostTable, ISD, LT.second))
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return LT.first * Entry->Cost;
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static const CostTblEntry X64CostTbl[] = { // 64-bit targets
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{ ISD::ADD, MVT::i64, 1 }, // Core (Merom) from http://www.agner.org/
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{ ISD::SUB, MVT::i64, 1 }, // Core (Merom) from http://www.agner.org/
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};
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if (ST->is64Bit())
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if (const auto *Entry = CostTableLookup(X64CostTbl, ISD, LT.second))
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return LT.first * Entry->Cost;
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static const CostTblEntry X86CostTbl[] = { // 32 or 64-bit targets
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{ ISD::ADD, MVT::i8, 1 }, // Pentium III from http://www.agner.org/
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{ ISD::ADD, MVT::i16, 1 }, // Pentium III from http://www.agner.org/
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{ ISD::ADD, MVT::i32, 1 }, // Pentium III from http://www.agner.org/
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@ -973,8 +988,7 @@ InstructionCost X86TTIImpl::getArithmeticInstrCost(
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{ ISD::SUB, MVT::i32, 1 }, // Pentium III from http://www.agner.org/
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};
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if (ST->hasSSE1())
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if (const auto *Entry = CostTableLookup(SSE1CostTable, ISD, LT.second))
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if (const auto *Entry = CostTableLookup(X86CostTbl, ISD, LT.second))
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return LT.first * Entry->Cost;
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// It is not a good idea to vectorize division. We have to scalarize it and
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