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Chris pointed out that it's not necessary to set i64 MUL to Expand
on x86-32 since i64 itself is not a Legal type. And, update some comments. llvm-svn: 47282
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@ -169,13 +169,16 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
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setOperationAction(ISD::BIT_CONVERT , MVT::i32 , Expand);
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}
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// Scalar integer multiply-high, divide, and remainder are
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// lowered to use operations that produce two results, to match the
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// available instructions. This exposes the two-result form to trivial
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// CSE, which is able to combine x/y and x%y into a single instruction,
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// for example. The single-result multiply instructions are introduced
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// in X86ISelDAGToDAG.cpp, after CSE, for uses where the the high part
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// is not needed.
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// Scalar integer divide and remainder are lowered to use operations that
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// produce two results, to match the available instructions. This exposes
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// the two-result form to trivial CSE, which is able to combine x/y and x%y
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// into a single instruction.
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//
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// Scalar integer multiply-high is also lowered to use two-result
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// operations, to match the available instructions. However, plain multiply
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// (low) operations are left as Legal, as there are single-result
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// instructions for this in x86. Using the two-result multiply instructions
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// when both high and low results are needed must be arranged by dagcombine.
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setOperationAction(ISD::MULHS , MVT::i8 , Expand);
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setOperationAction(ISD::MULHU , MVT::i8 , Expand);
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setOperationAction(ISD::SDIV , MVT::i8 , Expand);
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@ -201,11 +204,6 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM)
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setOperationAction(ISD::SREM , MVT::i64 , Expand);
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setOperationAction(ISD::UREM , MVT::i64 , Expand);
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// 8, 16, and 32-bit plain multiply are legal. And 64-bit multiply
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// is also legal on x86-64.
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if (!Subtarget->is64Bit())
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setOperationAction(ISD::MUL , MVT::i64 , Expand);
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setOperationAction(ISD::BR_JT , MVT::Other, Expand);
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setOperationAction(ISD::BRCOND , MVT::Other, Custom);
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setOperationAction(ISD::BR_CC , MVT::Other, Expand);
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