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https://github.com/RPCS3/llvm-mirror.git
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[AntiDepBreaker] Revert r299124 and add a test.
Summary: AntiDepBreaker intends to add all live-outs, including the implicit CSRs, in StartBlock. r299124 was done without understanding that intention. Now with the live-ins propagated correctly (D32464), we can revert this change. Reviewers: MatzeB, qcolombet Subscribers: nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D33697 llvm-svn: 304251
This commit is contained in:
Tim Shen
parent
24fbd64640
commit
0d33cc852f
@ -165,7 +165,7 @@ void AggressiveAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
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for (const MCPhysReg *I = MF.getRegInfo().getCalleeSavedRegs(); *I;
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++I) {
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unsigned Reg = *I;
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if (!IsReturnBlock && !(Pristine.test(Reg) || BB->isLiveIn(Reg)))
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if (!IsReturnBlock && !Pristine.test(Reg))
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continue;
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for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
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unsigned AliasReg = *AI;
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@ -74,7 +74,7 @@ void CriticalAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
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for (const MCPhysReg *I = MF.getRegInfo().getCalleeSavedRegs(); *I;
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++I) {
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unsigned Reg = *I;
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if (!IsReturnBlock && !(Pristine.test(Reg) || BB->isLiveIn(Reg)))
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if (!IsReturnBlock && !Pristine.test(Reg))
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continue;
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for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) {
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unsigned Reg = *AI;
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@ -1,330 +0,0 @@
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# RUN: llc -run-pass=post-RA-sched %s -o - | FileCheck %s
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# CHECK: callee-saved-register: '[[REG:%x[0-9]+]]'
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# CHECK: callee-saved-register: '{{%x[0-9]+}}'
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# CHECK-NOT: [[REG]] = LI8 0
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# CHECK: STD killed [[REG]],
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--- |
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; ModuleID = '<stdin>'
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source_filename = "bugpoint-output-4d91ae2.bc"
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le--linux-gnu"
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; Function Attrs: norecurse nounwind readonly
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define i64 @adler32_z(i64 %adler, i8* readonly %buf, i64 %len) local_unnamed_addr #0 {
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entry:
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%shr = lshr i64 %adler, 16
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%and = and i64 %shr, 65535
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%and1 = and i64 %adler, 65535
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br i1 undef, label %if.then, label %if.end15
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if.then: ; preds = %entry
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%add5 = add nsw i64 %and1, %and
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%sub9 = add nsw i64 %add5, 281474976645135
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%shl = shl i64 %add5, 16
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%or = or i64 %shl, %and1
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br label %cleanup
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if.end15: ; preds = %entry
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br i1 undef, label %while.cond.preheader, label %while.cond30.preheader
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while.cond30.preheader: ; preds = %if.end15
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br i1 undef, label %while.body33.preheader, label %while.body109.preheader
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while.body33.preheader: ; preds = %while.cond30.preheader
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br label %while.body33
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while.cond.preheader: ; preds = %if.end15
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%sub25 = add i64 %and1, -65521
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%rem = urem i64 %and, 65521
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%shl27 = shl nuw nsw i64 %rem, 16
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%or28 = or i64 %shl27, %and1
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br label %cleanup
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while.body33: ; preds = %do.end, %while.body33.preheader
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%indvar = phi i64 [ %indvar.next, %do.end ], [ 0, %while.body33.preheader ]
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%sum2.2385 = phi i64 [ %rem102, %do.end ], [ %and, %while.body33.preheader ]
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%len.addr.1384 = phi i64 [ %sub34, %do.end ], [ %len, %while.body33.preheader ]
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%buf.addr.1383 = phi i8* [ %scevgep390, %do.end ], [ %buf, %while.body33.preheader ]
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%adler.addr.3382 = phi i64 [ %rem101, %do.end ], [ %and1, %while.body33.preheader ]
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%0 = mul i64 %indvar, 5552
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%1 = add i64 %0, -13
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%scevgep2 = getelementptr i8, i8* %buf, i64 %1
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%sub34 = add i64 %len.addr.1384, -5552
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call void @llvm.ppc.mtctr.i64(i64 347)
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br label %do.body
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do.body: ; preds = %do.body, %while.body33
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%adler.addr.4 = phi i64 [ %adler.addr.3382, %while.body33 ], [ %add49, %do.body ]
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%sum2.3 = phi i64 [ %sum2.2385, %while.body33 ], [ %add98, %do.body ]
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%tmp15.phi = phi i8* [ %scevgep2, %while.body33 ], [ %tmp15.inc, %do.body ]
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%tmp15.inc = getelementptr i8, i8* %tmp15.phi, i64 16
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%add38 = add i64 %adler.addr.4, %sum2.3
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%add42 = add i64 %add38, %adler.addr.4
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%add46 = add i64 %add42, %adler.addr.4
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%tmp15 = load i8, i8* %tmp15.inc, align 1, !tbaa !1
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%conv48 = zext i8 %tmp15 to i64
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%add49 = add i64 %adler.addr.4, %conv48
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%add50 = add i64 %add46, %add49
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%add54 = add i64 %add50, %add49
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%add58 = add i64 %add54, %add49
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%add62 = add i64 %add58, %add49
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%add66 = add i64 %add62, %add49
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%add70 = add i64 %add66, %add49
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%add74 = add i64 %add70, %add49
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%add78 = add i64 %add74, %add49
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%add82 = add i64 %add78, %add49
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%add86 = add i64 %add82, %add49
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%add90 = add i64 %add86, %add49
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%add94 = add i64 %add90, %add49
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%add98 = add i64 %add94, %add49
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%2 = call i1 @llvm.ppc.is.decremented.ctr.nonzero()
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br i1 %2, label %do.body, label %do.end
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do.end: ; preds = %do.body
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%scevgep390 = getelementptr i8, i8* %buf.addr.1383, i64 5552
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%rem101 = urem i64 %add49, 65521
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%rem102 = urem i64 %add98, 65521
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%cmp31 = icmp ugt i64 %sub34, 5551
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%indvar.next = add i64 %indvar, 1
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br i1 %cmp31, label %while.body33, label %while.end103
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while.end103: ; preds = %do.end
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br i1 undef, label %if.end188, label %while.body109.preheader
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while.body109.preheader: ; preds = %while.end103, %while.cond30.preheader
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%buf.addr.1.lcssa394400 = phi i8* [ %buf, %while.cond30.preheader ], [ %scevgep390, %while.end103 ]
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%arrayidx151 = getelementptr inbounds i8, i8* %buf.addr.1.lcssa394400, i64 10
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%tmp45 = load i8, i8* %arrayidx151, align 1, !tbaa !1
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%conv152 = zext i8 %tmp45 to i64
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br label %while.body109
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while.body109: ; preds = %while.body109, %while.body109.preheader
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%adler.addr.5373 = phi i64 [ %add153, %while.body109 ], [ undef, %while.body109.preheader ]
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%add153 = add i64 %adler.addr.5373, %conv152
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br label %while.body109
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if.end188: ; preds = %while.end103
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%shl189 = shl nuw nsw i64 %rem102, 16
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%or190 = or i64 %shl189, %rem101
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br label %cleanup
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cleanup: ; preds = %if.end188, %while.cond.preheader, %if.then
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%retval.0 = phi i64 [ %or, %if.then ], [ %or28, %while.cond.preheader ], [ %or190, %if.end188 ]
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ret i64 %retval.0
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}
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; Function Attrs: nounwind
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declare void @llvm.ppc.mtctr.i64(i64) #1
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; Function Attrs: nounwind
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declare i1 @llvm.ppc.is.decremented.ctr.nonzero() #1
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; Function Attrs: nounwind
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declare void @llvm.stackprotector(i8*, i8**) #1
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attributes #0 = { norecurse nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="ppc64le" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+power8-vector,+vsx,-power9-vector,-qpx" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { nounwind }
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!llvm.ident = !{!0}
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!0 = !{!"clang version 5.0.0 "}
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!1 = !{!2, !2, i64 0}
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!2 = !{!"omnipotent char", !3, i64 0}
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!3 = !{!"Simple C/C++ TBAA"}
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...
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---
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name: adler32_z
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alignment: 4
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exposesReturnsTwice: false
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legalized: false
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regBankSelected: false
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selected: false
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tracksRegLiveness: true
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liveins:
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- { reg: '%x3' }
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- { reg: '%x4' }
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- { reg: '%x5' }
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frameInfo:
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isFrameAddressTaken: false
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isReturnAddressTaken: false
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hasStackMap: false
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hasPatchPoint: false
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stackSize: 0
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offsetAdjustment: 0
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maxAlignment: 0
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adjustsStack: false
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hasCalls: false
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maxCallFrameSize: 0
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hasOpaqueSPAdjustment: false
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hasVAStart: false
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hasMustTailInVarArgFunc: false
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fixedStack:
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- { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '%x30' }
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- { id: 1, type: spill-slot, offset: -24, size: 8, alignment: 8, callee-saved-register: '%x29' }
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- { id: 2, offset: -8, size: 8, alignment: 8, isImmutable: true, isAliased: false }
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body: |
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bb.0.entry:
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successors: %bb.1.if.then(0x40000000), %bb.3.if.end15(0x40000000)
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liveins: %x3, %x4, %x5, %x29, %x30
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%x6 = RLWINM8 %x3, 16, 16, 31
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%x3 = RLDICL killed %x3, 0, 48
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BC undef %cr5lt, %bb.3.if.end15
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bb.1.if.then:
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successors: %bb.2.if.then(0x80000000)
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liveins: %x3, %x6, %x29, %x30
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%x4 = ADD8 %x3, killed %x6
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bb.2.if.then:
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liveins: %lr8, %rm, %x3, %x4
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%x4 = RLDICR killed %x4, 16, 47
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%x3 = OR8 killed %x4, killed %x3
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BLR8 implicit %lr8, implicit %rm, implicit %x3
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bb.3.if.end15:
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successors: %bb.6.while.cond.preheader(0x40000000), %bb.4.while.cond30.preheader(0x40000000)
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liveins: %x3, %x4, %x5, %x6, %x29, %x30
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BC undef %cr5lt, %bb.6.while.cond.preheader
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bb.4.while.cond30.preheader:
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successors: %bb.7.while.body33.preheader(0x40000000), %bb.5(0x40000000)
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liveins: %x3, %x4, %x5, %x6, %x29, %x30
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BCn undef %cr5lt, %bb.7.while.body33.preheader
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bb.5:
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successors: %bb.12.while.body109.preheader(0x80000000)
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liveins: %x4, %x29, %x30
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%x7 = OR8 %x4, killed %x4
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B %bb.12.while.body109.preheader
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bb.6.while.cond.preheader:
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successors: %bb.2.if.then(0x80000000)
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liveins: %x3, %x6, %x29, %x30
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%x4 = LIS8 15
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%x4 = ORI8 killed %x4, 225
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%x4 = RLDICR killed %x4, 32, 31
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%x4 = ORIS8 killed %x4, 3375
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%x4 = ORI8 killed %x4, 50637
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%x4 = MULHDU %x6, killed %x4
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%x5 = SUBF8 %x4, %x6
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%x5 = RLDICL killed %x5, 63, 1
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%x4 = ADD8 killed %x5, killed %x4
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%x5 = LI8 0
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%x4 = RLDICL killed %x4, 49, 15
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%x5 = ORI8 killed %x5, 65521
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%x4 = MULLD killed %x4, killed %x5
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%x4 = SUBF8 killed %x4, killed %x6
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B %bb.2.if.then
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bb.7.while.body33.preheader:
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successors: %bb.8.while.body33(0x80000000)
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liveins: %x3, %x4, %x5, %x6, %x29, %x30
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STD killed %x29, -24, %x1 :: (store 8 into %fixed-stack.1)
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STD killed %x30, -16, %x1 :: (store 8 into %fixed-stack.0, align 16)
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%x7 = LIS8 15
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%x7 = ORI8 killed %x7, 225
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%x7 = RLDICR killed %x7, 32, 31
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%x8 = LI8 0
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%x7 = ORIS8 killed %x7, 3375
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%x9 = LI8 347
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%x10 = ORI8 killed %x7, 50637
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%x11 = ORI8 %x8, 65521
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%x7 = OR8 %x4, %x4
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bb.8.while.body33:
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successors: %bb.9.do.body(0x80000000)
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liveins: %x3, %x4, %x5, %x6, %x7, %x8, %x9, %x10, %x11
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%x12 = MULLI8 %x8, 5552
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%x12 = ADD8 %x4, killed %x12
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%x12 = ADDI8 killed %x12, -13
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%x5 = ADDI8 killed %x5, -5552
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MTCTR8loop %x9, implicit-def dead %ctr8
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bb.9.do.body:
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successors: %bb.9.do.body(0x7c000000), %bb.10.do.end(0x04000000)
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liveins: %x3, %x4, %x5, %x6, %x7, %x8, %x9, %x10, %x11, %x12
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%x0, %x12 = LBZU8 16, killed %x12 :: (load 1 from %ir.tmp15.inc, !tbaa !1)
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%x6 = ADD8 %x3, killed %x6
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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%x3 = ADD8 killed %x3, killed %x0
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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%x6 = ADD8 killed %x6, %x3
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BDNZ8 %bb.9.do.body, implicit-def %ctr8, implicit %ctr8
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bb.10.do.end:
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successors: %bb.8.while.body33(0x7c000000), %bb.11.while.end103(0x04000000)
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liveins: %x3, %x4, %x5, %x6, %x7, %x8, %x9, %x10, %x11
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%x12 = MULHDU %x3, %x10
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%x0 = MULHDU %x6, %x10
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%x30 = SUBF8 %x12, %x3
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%x29 = SUBF8 %x0, %x6
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%x30 = RLDICL killed %x30, 63, 1
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%x29 = RLDICL killed %x29, 63, 1
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%x12 = ADD8 killed %x30, killed %x12
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%x0 = ADD8 killed %x29, killed %x0
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%cr0 = CMPLDI %x5, 5551
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%x12 = RLDICL killed %x12, 49, 15
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%x0 = RLDICL killed %x0, 49, 15
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%x12 = MULLD killed %x12, %x11
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%x0 = MULLD killed %x0, %x11
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%x7 = ADDI8 killed %x7, 5552
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%x3 = SUBF8 killed %x12, killed %x3
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%x6 = SUBF8 killed %x0, killed %x6
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%x8 = ADDI8 killed %x8, 1
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BCC 44, killed %cr0, %bb.8.while.body33
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bb.11.while.end103:
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successors: %bb.14.if.end188(0x40000000), %bb.12.while.body109.preheader(0x40000000)
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liveins: %x3, %x6, %x7
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%x30 = LD -16, %x1 :: (load 8 from %fixed-stack.0, align 16)
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%x29 = LD -24, %x1 :: (load 8 from %fixed-stack.1)
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BC undef %cr5lt, %bb.14.if.end188
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bb.12.while.body109.preheader:
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successors: %bb.13.while.body109(0x80000000)
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liveins: %x7, %x29, %x30
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%x3 = LBZ8 10, killed %x7 :: (load 1 from %ir.arrayidx151, !tbaa !1)
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%x4 = IMPLICIT_DEF
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bb.13.while.body109:
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successors: %bb.13.while.body109(0x80000000)
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liveins: %x3, %x4, %x29, %x30
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%x4 = ADD8 killed %x4, %x3
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B %bb.13.while.body109
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bb.14.if.end188:
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liveins: %x3, %x6, %x29, %x30
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%x4 = RLDICR killed %x6, 16, 47
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%x3 = OR8 killed %x4, killed %x3
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BLR8 implicit %lr8, implicit %rm, implicit %x3
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...
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