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https://github.com/RPCS3/llvm-mirror.git
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continue MachinePointerInfo'izing, eliminating use of one of the old
getLoad overloads. llvm-svn: 114443
This commit is contained in:
parent
5c0bdf4543
commit
0d430648ae
@ -632,9 +632,6 @@ public:
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SDValue getLoad(EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr,
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SDValue getLoad(EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr,
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MachinePointerInfo PtrInfo, bool isVolatile,
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MachinePointerInfo PtrInfo, bool isVolatile,
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bool isNonTemporal, unsigned Alignment);
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bool isNonTemporal, unsigned Alignment);
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SDValue getLoad(EVT VT, DebugLoc dl, SDValue Chain, SDValue Ptr,
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const Value *SV, int SVOffset, bool isVolatile,
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bool isNonTemporal, unsigned Alignment);
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SDValue getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl,
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SDValue getExtLoad(ISD::LoadExtType ExtType, EVT VT, DebugLoc dl,
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SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo,
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SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo,
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EVT MemVT, bool isVolatile,
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EVT MemVT, bool isVolatile,
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@ -425,8 +425,8 @@ SDValue ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG,
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// Perform the original store, only redirected to the stack slot.
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// Perform the original store, only redirected to the stack slot.
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SDValue Store = DAG.getTruncStore(Chain, dl,
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SDValue Store = DAG.getTruncStore(Chain, dl,
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Val, StackPtr, NULL, 0, StoredVT,
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Val, StackPtr, MachinePointerInfo(),
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false, false, 0);
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StoredVT, false, false, 0);
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SDValue Increment = DAG.getConstant(RegBytes, TLI.getPointerTy());
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SDValue Increment = DAG.getConstant(RegBytes, TLI.getPointerTy());
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SmallVector<SDValue, 8> Stores;
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SmallVector<SDValue, 8> Stores;
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unsigned Offset = 0;
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unsigned Offset = 0;
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@ -434,11 +434,12 @@ SDValue ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG,
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// Do all but one copies using the full register width.
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// Do all but one copies using the full register width.
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for (unsigned i = 1; i < NumRegs; i++) {
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for (unsigned i = 1; i < NumRegs; i++) {
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// Load one integer register's worth from the stack slot.
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// Load one integer register's worth from the stack slot.
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SDValue Load = DAG.getLoad(RegVT, dl, Store, StackPtr, NULL, 0,
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SDValue Load = DAG.getLoad(RegVT, dl, Store, StackPtr,
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MachinePointerInfo(),
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false, false, 0);
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false, false, 0);
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// Store it to the final location. Remember the store.
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// Store it to the final location. Remember the store.
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Stores.push_back(DAG.getStore(Load.getValue(1), dl, Load, Ptr,
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Stores.push_back(DAG.getStore(Load.getValue(1), dl, Load, Ptr,
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ST->getSrcValue(), SVOffset + Offset,
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ST->getPointerInfo().getWithOffset(Offset),
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ST->isVolatile(), ST->isNonTemporal(),
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ST->isVolatile(), ST->isNonTemporal(),
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MinAlign(ST->getAlignment(), Offset)));
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MinAlign(ST->getAlignment(), Offset)));
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// Increment the pointers.
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// Increment the pointers.
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@ -501,7 +502,6 @@ SDValue ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG,
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static
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static
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SDValue ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG,
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SDValue ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG,
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const TargetLowering &TLI) {
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const TargetLowering &TLI) {
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int SVOffset = LD->getSrcValueOffset();
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SDValue Chain = LD->getChain();
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SDValue Chain = LD->getChain();
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SDValue Ptr = LD->getBasePtr();
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SDValue Ptr = LD->getBasePtr();
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EVT VT = LD->getValueType(0);
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EVT VT = LD->getValueType(0);
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@ -512,8 +512,8 @@ SDValue ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG,
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if (TLI.isTypeLegal(intVT)) {
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if (TLI.isTypeLegal(intVT)) {
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// Expand to a (misaligned) integer load of the same size,
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// Expand to a (misaligned) integer load of the same size,
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// then bitconvert to floating point or vector.
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// then bitconvert to floating point or vector.
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SDValue newLoad = DAG.getLoad(intVT, dl, Chain, Ptr, LD->getSrcValue(),
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SDValue newLoad = DAG.getLoad(intVT, dl, Chain, Ptr, LD->getPointerInfo(),
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SVOffset, LD->isVolatile(),
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LD->isVolatile(),
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LD->isNonTemporal(), LD->getAlignment());
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LD->isNonTemporal(), LD->getAlignment());
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SDValue Result = DAG.getNode(ISD::BIT_CONVERT, dl, LoadedVT, newLoad);
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SDValue Result = DAG.getNode(ISD::BIT_CONVERT, dl, LoadedVT, newLoad);
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if (VT.isFloatingPoint() && LoadedVT != VT)
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if (VT.isFloatingPoint() && LoadedVT != VT)
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@ -521,65 +521,66 @@ SDValue ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG,
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SDValue Ops[] = { Result, Chain };
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SDValue Ops[] = { Result, Chain };
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return DAG.getMergeValues(Ops, 2, dl);
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return DAG.getMergeValues(Ops, 2, dl);
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} else {
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// Copy the value to a (aligned) stack slot using (unaligned) integer
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// loads and stores, then do a (aligned) load from the stack slot.
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EVT RegVT = TLI.getRegisterType(*DAG.getContext(), intVT);
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unsigned LoadedBytes = LoadedVT.getSizeInBits() / 8;
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unsigned RegBytes = RegVT.getSizeInBits() / 8;
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unsigned NumRegs = (LoadedBytes + RegBytes - 1) / RegBytes;
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// Make sure the stack slot is also aligned for the register type.
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SDValue StackBase = DAG.CreateStackTemporary(LoadedVT, RegVT);
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SDValue Increment = DAG.getConstant(RegBytes, TLI.getPointerTy());
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SmallVector<SDValue, 8> Stores;
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SDValue StackPtr = StackBase;
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unsigned Offset = 0;
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// Do all but one copies using the full register width.
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for (unsigned i = 1; i < NumRegs; i++) {
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// Load one integer register's worth from the original location.
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SDValue Load = DAG.getLoad(RegVT, dl, Chain, Ptr, LD->getSrcValue(),
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SVOffset + Offset, LD->isVolatile(),
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LD->isNonTemporal(),
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MinAlign(LD->getAlignment(), Offset));
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// Follow the load with a store to the stack slot. Remember the store.
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Stores.push_back(DAG.getStore(Load.getValue(1), dl, Load, StackPtr,
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NULL, 0, false, false, 0));
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// Increment the pointers.
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Offset += RegBytes;
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Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment);
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StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
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Increment);
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}
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// The last copy may be partial. Do an extending load.
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EVT MemVT = EVT::getIntegerVT(*DAG.getContext(),
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8 * (LoadedBytes - Offset));
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SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, RegVT, dl, Chain, Ptr,
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LD->getSrcValue(), SVOffset + Offset,
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MemVT, LD->isVolatile(),
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LD->isNonTemporal(),
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MinAlign(LD->getAlignment(), Offset));
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// Follow the load with a store to the stack slot. Remember the store.
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// On big-endian machines this requires a truncating store to ensure
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// that the bits end up in the right place.
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Stores.push_back(DAG.getTruncStore(Load.getValue(1), dl, Load, StackPtr,
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NULL, 0, MemVT, false, false, 0));
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// The order of the stores doesn't matter - say it with a TokenFactor.
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SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Stores[0],
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Stores.size());
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// Finally, perform the original load only redirected to the stack slot.
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Load = DAG.getExtLoad(LD->getExtensionType(), VT, dl, TF, StackBase,
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NULL, 0, LoadedVT, false, false, 0);
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// Callers expect a MERGE_VALUES node.
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SDValue Ops[] = { Load, TF };
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return DAG.getMergeValues(Ops, 2, dl);
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}
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}
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// Copy the value to a (aligned) stack slot using (unaligned) integer
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// loads and stores, then do a (aligned) load from the stack slot.
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EVT RegVT = TLI.getRegisterType(*DAG.getContext(), intVT);
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unsigned LoadedBytes = LoadedVT.getSizeInBits() / 8;
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unsigned RegBytes = RegVT.getSizeInBits() / 8;
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unsigned NumRegs = (LoadedBytes + RegBytes - 1) / RegBytes;
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// Make sure the stack slot is also aligned for the register type.
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SDValue StackBase = DAG.CreateStackTemporary(LoadedVT, RegVT);
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SDValue Increment = DAG.getConstant(RegBytes, TLI.getPointerTy());
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SmallVector<SDValue, 8> Stores;
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SDValue StackPtr = StackBase;
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unsigned Offset = 0;
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// Do all but one copies using the full register width.
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for (unsigned i = 1; i < NumRegs; i++) {
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// Load one integer register's worth from the original location.
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SDValue Load = DAG.getLoad(RegVT, dl, Chain, Ptr,
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LD->getPointerInfo().getWithOffset(Offset),
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LD->isVolatile(), LD->isNonTemporal(),
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MinAlign(LD->getAlignment(), Offset));
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// Follow the load with a store to the stack slot. Remember the store.
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Stores.push_back(DAG.getStore(Load.getValue(1), dl, Load, StackPtr,
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NULL, 0, false, false, 0));
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// Increment the pointers.
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Offset += RegBytes;
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Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment);
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StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
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Increment);
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}
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// The last copy may be partial. Do an extending load.
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EVT MemVT = EVT::getIntegerVT(*DAG.getContext(),
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8 * (LoadedBytes - Offset));
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SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, RegVT, dl, Chain, Ptr,
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LD->getPointerInfo().getWithOffset(Offset),
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MemVT, LD->isVolatile(),
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LD->isNonTemporal(),
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MinAlign(LD->getAlignment(), Offset));
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// Follow the load with a store to the stack slot. Remember the store.
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// On big-endian machines this requires a truncating store to ensure
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// that the bits end up in the right place.
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Stores.push_back(DAG.getTruncStore(Load.getValue(1), dl, Load, StackPtr,
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MachinePointerInfo(), MemVT,
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false, false, 0));
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// The order of the stores doesn't matter - say it with a TokenFactor.
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SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Stores[0],
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Stores.size());
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// Finally, perform the original load only redirected to the stack slot.
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Load = DAG.getExtLoad(LD->getExtensionType(), VT, dl, TF, StackBase,
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MachinePointerInfo(), LoadedVT, false, false, 0);
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// Callers expect a MERGE_VALUES node.
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SDValue Ops[] = { Load, TF };
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return DAG.getMergeValues(Ops, 2, dl);
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}
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}
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assert(LoadedVT.isInteger() && !LoadedVT.isVector() &&
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assert(LoadedVT.isInteger() && !LoadedVT.isVector() &&
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"Unaligned load of unsupported type.");
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"Unaligned load of unsupported type.");
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@ -602,22 +603,24 @@ SDValue ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG,
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// Load the value in two parts
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// Load the value in two parts
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SDValue Lo, Hi;
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SDValue Lo, Hi;
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if (TLI.isLittleEndian()) {
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if (TLI.isLittleEndian()) {
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Lo = DAG.getExtLoad(ISD::ZEXTLOAD, VT, dl, Chain, Ptr, LD->getSrcValue(),
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Lo = DAG.getExtLoad(ISD::ZEXTLOAD, VT, dl, Chain, Ptr, LD->getPointerInfo(),
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SVOffset, NewLoadedVT, LD->isVolatile(),
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NewLoadedVT, LD->isVolatile(),
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LD->isNonTemporal(), Alignment);
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LD->isNonTemporal(), Alignment);
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Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
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Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
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DAG.getConstant(IncrementSize, TLI.getPointerTy()));
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DAG.getConstant(IncrementSize, TLI.getPointerTy()));
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Hi = DAG.getExtLoad(HiExtType, VT, dl, Chain, Ptr, LD->getSrcValue(),
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Hi = DAG.getExtLoad(HiExtType, VT, dl, Chain, Ptr,
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SVOffset + IncrementSize, NewLoadedVT, LD->isVolatile(),
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LD->getPointerInfo().getWithOffset(IncrementSize),
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NewLoadedVT, LD->isVolatile(),
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LD->isNonTemporal(), MinAlign(Alignment,IncrementSize));
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LD->isNonTemporal(), MinAlign(Alignment,IncrementSize));
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} else {
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} else {
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Hi = DAG.getExtLoad(HiExtType, VT, dl, Chain, Ptr, LD->getSrcValue(),
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Hi = DAG.getExtLoad(HiExtType, VT, dl, Chain, Ptr, LD->getPointerInfo(),
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SVOffset, NewLoadedVT, LD->isVolatile(),
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NewLoadedVT, LD->isVolatile(),
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LD->isNonTemporal(), Alignment);
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LD->isNonTemporal(), Alignment);
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Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
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Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
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DAG.getConstant(IncrementSize, TLI.getPointerTy()));
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DAG.getConstant(IncrementSize, TLI.getPointerTy()));
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Lo = DAG.getExtLoad(ISD::ZEXTLOAD, VT, dl, Chain, Ptr, LD->getSrcValue(),
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Lo = DAG.getExtLoad(ISD::ZEXTLOAD, VT, dl, Chain, Ptr,
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SVOffset + IncrementSize, NewLoadedVT, LD->isVolatile(),
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LD->getPointerInfo().getWithOffset(IncrementSize),
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NewLoadedVT, LD->isVolatile(),
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LD->isNonTemporal(), MinAlign(Alignment,IncrementSize));
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LD->isNonTemporal(), MinAlign(Alignment,IncrementSize));
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}
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}
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@ -1134,8 +1137,7 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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// Change base type to a different vector type.
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// Change base type to a different vector type.
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EVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT);
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EVT NVT = TLI.getTypeToPromoteTo(Node->getOpcode(), VT);
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Tmp1 = DAG.getLoad(NVT, dl, Tmp1, Tmp2, LD->getSrcValue(),
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Tmp1 = DAG.getLoad(NVT, dl, Tmp1, Tmp2, LD->getPointerInfo(),
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LD->getSrcValueOffset(),
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LD->isVolatile(), LD->isNonTemporal(),
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LD->isVolatile(), LD->isNonTemporal(),
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LD->getAlignment());
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LD->getAlignment());
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Tmp3 = LegalizeOp(DAG.getNode(ISD::BIT_CONVERT, dl, VT, Tmp1));
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Tmp3 = LegalizeOp(DAG.getNode(ISD::BIT_CONVERT, dl, VT, Tmp1));
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@ -1312,8 +1314,8 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
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break;
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break;
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case TargetLowering::Expand:
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case TargetLowering::Expand:
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if (!TLI.isLoadExtLegal(ISD::EXTLOAD, SrcVT) && isTypeLegal(SrcVT)) {
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if (!TLI.isLoadExtLegal(ISD::EXTLOAD, SrcVT) && isTypeLegal(SrcVT)) {
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SDValue Load = DAG.getLoad(SrcVT, dl, Tmp1, Tmp2, LD->getSrcValue(),
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SDValue Load = DAG.getLoad(SrcVT, dl, Tmp1, Tmp2,
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LD->getSrcValueOffset(),
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LD->getPointerInfo(),
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LD->isVolatile(), LD->isNonTemporal(),
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LD->isVolatile(), LD->isNonTemporal(),
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LD->getAlignment());
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LD->getAlignment());
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unsigned ExtendOp;
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unsigned ExtendOp;
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@ -1558,11 +1560,12 @@ SDValue SelectionDAGLegalize::ExpandExtractFromVectorThroughStack(SDValue Op) {
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StackPtr = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, StackPtr);
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StackPtr = DAG.getNode(ISD::ADD, dl, Idx.getValueType(), Idx, StackPtr);
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if (Op.getValueType().isVector())
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if (Op.getValueType().isVector())
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return DAG.getLoad(Op.getValueType(), dl, Ch, StackPtr, NULL, 0,
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return DAG.getLoad(Op.getValueType(), dl, Ch, StackPtr,MachinePointerInfo(),
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false, false, 0);
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false, false, 0);
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else
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else
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return DAG.getExtLoad(ISD::EXTLOAD, Op.getValueType(), dl, Ch, StackPtr,
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return DAG.getExtLoad(ISD::EXTLOAD, Op.getValueType(), dl, Ch, StackPtr,
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NULL, 0, Vec.getValueType().getVectorElementType(),
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MachinePointerInfo(),
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Vec.getValueType().getVectorElementType(),
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false, false, 0);
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false, false, 0);
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}
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}
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@ -1576,7 +1579,7 @@ SDValue SelectionDAGLegalize::ExpandVectorBuildThroughStack(SDNode* Node) {
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DebugLoc dl = Node->getDebugLoc();
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DebugLoc dl = Node->getDebugLoc();
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SDValue FIPtr = DAG.CreateStackTemporary(VT);
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SDValue FIPtr = DAG.CreateStackTemporary(VT);
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int FI = cast<FrameIndexSDNode>(FIPtr.getNode())->getIndex();
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int FI = cast<FrameIndexSDNode>(FIPtr.getNode())->getIndex();
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const Value *SV = PseudoSourceValue::getFixedStack(FI);
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MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(FI);
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// Emit a store of each element to the stack slot.
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// Emit a store of each element to the stack slot.
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SmallVector<SDValue, 8> Stores;
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SmallVector<SDValue, 8> Stores;
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@ -1595,11 +1598,13 @@ SDValue SelectionDAGLegalize::ExpandVectorBuildThroughStack(SDNode* Node) {
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// element type, only store the bits necessary.
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// element type, only store the bits necessary.
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if (EltVT.bitsLT(Node->getOperand(i).getValueType().getScalarType())) {
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if (EltVT.bitsLT(Node->getOperand(i).getValueType().getScalarType())) {
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Stores.push_back(DAG.getTruncStore(DAG.getEntryNode(), dl,
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Stores.push_back(DAG.getTruncStore(DAG.getEntryNode(), dl,
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Node->getOperand(i), Idx, SV, Offset,
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Node->getOperand(i), Idx,
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PtrInfo.getWithOffset(Offset),
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EltVT, false, false, 0));
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EltVT, false, false, 0));
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} else
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} else
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Stores.push_back(DAG.getStore(DAG.getEntryNode(), dl,
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Stores.push_back(DAG.getStore(DAG.getEntryNode(), dl,
|
||||||
Node->getOperand(i), Idx, SV, Offset,
|
Node->getOperand(i), Idx,
|
||||||
|
PtrInfo.getWithOffset(Offset),
|
||||||
false, false, 0));
|
false, false, 0));
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1611,7 +1616,7 @@ SDValue SelectionDAGLegalize::ExpandVectorBuildThroughStack(SDNode* Node) {
|
|||||||
StoreChain = DAG.getEntryNode();
|
StoreChain = DAG.getEntryNode();
|
||||||
|
|
||||||
// Result is a load from the stack slot.
|
// Result is a load from the stack slot.
|
||||||
return DAG.getLoad(VT, dl, StoreChain, FIPtr, SV, 0, false, false, 0);
|
return DAG.getLoad(VT, dl, StoreChain, FIPtr, PtrInfo, false, false, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
SDValue SelectionDAGLegalize::ExpandFCOPYSIGN(SDNode* Node) {
|
SDValue SelectionDAGLegalize::ExpandFCOPYSIGN(SDNode* Node) {
|
||||||
@ -1639,7 +1644,8 @@ SDValue SelectionDAGLegalize::ExpandFCOPYSIGN(SDNode* Node) {
|
|||||||
if (TLI.isBigEndian()) {
|
if (TLI.isBigEndian()) {
|
||||||
assert(FloatVT.isByteSized() && "Unsupported floating point type!");
|
assert(FloatVT.isByteSized() && "Unsupported floating point type!");
|
||||||
// Load out a legal integer with the same sign bit as the float.
|
// Load out a legal integer with the same sign bit as the float.
|
||||||
SignBit = DAG.getLoad(LoadTy, dl, Ch, StackPtr, NULL, 0, false, false, 0);
|
SignBit = DAG.getLoad(LoadTy, dl, Ch, StackPtr, MachinePointerInfo(),
|
||||||
|
false, false, 0);
|
||||||
} else { // Little endian
|
} else { // Little endian
|
||||||
SDValue LoadPtr = StackPtr;
|
SDValue LoadPtr = StackPtr;
|
||||||
// The float may be wider than the integer we are going to load. Advance
|
// The float may be wider than the integer we are going to load. Advance
|
||||||
@ -1649,7 +1655,8 @@ SDValue SelectionDAGLegalize::ExpandFCOPYSIGN(SDNode* Node) {
|
|||||||
LoadPtr = DAG.getNode(ISD::ADD, dl, LoadPtr.getValueType(),
|
LoadPtr = DAG.getNode(ISD::ADD, dl, LoadPtr.getValueType(),
|
||||||
LoadPtr, DAG.getIntPtrConstant(ByteOffset));
|
LoadPtr, DAG.getIntPtrConstant(ByteOffset));
|
||||||
// Load a legal integer containing the sign bit.
|
// Load a legal integer containing the sign bit.
|
||||||
SignBit = DAG.getLoad(LoadTy, dl, Ch, LoadPtr, NULL, 0, false, false, 0);
|
SignBit = DAG.getLoad(LoadTy, dl, Ch, LoadPtr, MachinePointerInfo(),
|
||||||
|
false, false, 0);
|
||||||
// Move the sign bit to the top bit of the loaded integer.
|
// Move the sign bit to the top bit of the loaded integer.
|
||||||
unsigned BitShift = LoadTy.getSizeInBits() -
|
unsigned BitShift = LoadTy.getSizeInBits() -
|
||||||
(FloatVT.getSizeInBits() - 8 * ByteOffset);
|
(FloatVT.getSizeInBits() - 8 * ByteOffset);
|
||||||
@ -1789,11 +1796,12 @@ SDValue SelectionDAGLegalize::EmitStackConvert(SDValue SrcOp,
|
|||||||
|
|
||||||
// Result is a load from the stack slot.
|
// Result is a load from the stack slot.
|
||||||
if (SlotSize == DestSize)
|
if (SlotSize == DestSize)
|
||||||
return DAG.getLoad(DestVT, dl, Store, FIPtr, SV, 0, false, false,
|
return DAG.getLoad(DestVT, dl, Store, FIPtr, MachinePointerInfo(SV),
|
||||||
DestAlign);
|
false, false, DestAlign);
|
||||||
|
|
||||||
assert(SlotSize < DestSize && "Unknown extension!");
|
assert(SlotSize < DestSize && "Unknown extension!");
|
||||||
return DAG.getExtLoad(ISD::EXTLOAD, DestVT, dl, Store, FIPtr, SV, 0, SlotVT,
|
return DAG.getExtLoad(ISD::EXTLOAD, DestVT, dl, Store, FIPtr,
|
||||||
|
MachinePointerInfo(SV), SlotVT,
|
||||||
false, false, DestAlign);
|
false, false, DestAlign);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2070,8 +2078,8 @@ SDValue SelectionDAGLegalize::ExpandLegalINT_TO_FP(bool isSigned,
|
|||||||
SDValue Store2=DAG.getStore(Store1, dl, InitialHi, Hi, NULL, 0,
|
SDValue Store2=DAG.getStore(Store1, dl, InitialHi, Hi, NULL, 0,
|
||||||
false, false, 0);
|
false, false, 0);
|
||||||
// load the constructed double
|
// load the constructed double
|
||||||
SDValue Load = DAG.getLoad(MVT::f64, dl, Store2, StackSlot, NULL, 0,
|
SDValue Load = DAG.getLoad(MVT::f64, dl, Store2, StackSlot,
|
||||||
false, false, 0);
|
MachinePointerInfo(), false, false, 0);
|
||||||
// FP constant to bias correct the final result
|
// FP constant to bias correct the final result
|
||||||
SDValue Bias = DAG.getConstantFP(isSigned ?
|
SDValue Bias = DAG.getConstantFP(isSigned ?
|
||||||
BitsToDouble(0x4330000080000000ULL) :
|
BitsToDouble(0x4330000080000000ULL) :
|
||||||
@ -2660,8 +2668,8 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
|
|||||||
Tmp2 = Node->getOperand(1);
|
Tmp2 = Node->getOperand(1);
|
||||||
unsigned Align = Node->getConstantOperandVal(3);
|
unsigned Align = Node->getConstantOperandVal(3);
|
||||||
|
|
||||||
SDValue VAListLoad = DAG.getLoad(TLI.getPointerTy(), dl, Tmp1, Tmp2, V, 0,
|
SDValue VAListLoad = DAG.getLoad(TLI.getPointerTy(), dl, Tmp1, Tmp2,
|
||||||
false, false, 0);
|
MachinePointerInfo(V), false, false, 0);
|
||||||
SDValue VAList = VAListLoad;
|
SDValue VAList = VAListLoad;
|
||||||
|
|
||||||
if (Align > TLI.getMinStackArgumentAlignment()) {
|
if (Align > TLI.getMinStackArgumentAlignment()) {
|
||||||
@ -2685,7 +2693,7 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
|
|||||||
Tmp3 = DAG.getStore(VAListLoad.getValue(1), dl, Tmp3, Tmp2, V, 0,
|
Tmp3 = DAG.getStore(VAListLoad.getValue(1), dl, Tmp3, Tmp2, V, 0,
|
||||||
false, false, 0);
|
false, false, 0);
|
||||||
// Load the actual argument out of the pointer VAList
|
// Load the actual argument out of the pointer VAList
|
||||||
Results.push_back(DAG.getLoad(VT, dl, Tmp3, VAList, NULL, 0,
|
Results.push_back(DAG.getLoad(VT, dl, Tmp3, VAList, MachinePointerInfo(),
|
||||||
false, false, 0));
|
false, false, 0));
|
||||||
Results.push_back(Results[0].getValue(1));
|
Results.push_back(Results[0].getValue(1));
|
||||||
break;
|
break;
|
||||||
@ -2696,9 +2704,10 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
|
|||||||
const Value *VD = cast<SrcValueSDNode>(Node->getOperand(3))->getValue();
|
const Value *VD = cast<SrcValueSDNode>(Node->getOperand(3))->getValue();
|
||||||
const Value *VS = cast<SrcValueSDNode>(Node->getOperand(4))->getValue();
|
const Value *VS = cast<SrcValueSDNode>(Node->getOperand(4))->getValue();
|
||||||
Tmp1 = DAG.getLoad(TLI.getPointerTy(), dl, Node->getOperand(0),
|
Tmp1 = DAG.getLoad(TLI.getPointerTy(), dl, Node->getOperand(0),
|
||||||
Node->getOperand(2), VS, 0, false, false, 0);
|
Node->getOperand(2), MachinePointerInfo(VS),
|
||||||
Tmp1 = DAG.getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1), VD, 0,
|
false, false, 0);
|
||||||
false, false, 0);
|
Tmp1 = DAG.getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1),
|
||||||
|
MachinePointerInfo(VD), false, false, 0);
|
||||||
Results.push_back(Tmp1);
|
Results.push_back(Tmp1);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
@ -889,7 +889,6 @@ SDValue DAGTypeLegalizer::PromoteIntOp_SINT_TO_FP(SDNode *N) {
|
|||||||
SDValue DAGTypeLegalizer::PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo){
|
SDValue DAGTypeLegalizer::PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo){
|
||||||
assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
|
assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
|
||||||
SDValue Ch = N->getChain(), Ptr = N->getBasePtr();
|
SDValue Ch = N->getChain(), Ptr = N->getBasePtr();
|
||||||
int SVOffset = N->getSrcValueOffset();
|
|
||||||
unsigned Alignment = N->getAlignment();
|
unsigned Alignment = N->getAlignment();
|
||||||
bool isVolatile = N->isVolatile();
|
bool isVolatile = N->isVolatile();
|
||||||
bool isNonTemporal = N->isNonTemporal();
|
bool isNonTemporal = N->isNonTemporal();
|
||||||
@ -898,8 +897,8 @@ SDValue DAGTypeLegalizer::PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo){
|
|||||||
SDValue Val = GetPromotedInteger(N->getValue()); // Get promoted value.
|
SDValue Val = GetPromotedInteger(N->getValue()); // Get promoted value.
|
||||||
|
|
||||||
// Truncate the value and store the result.
|
// Truncate the value and store the result.
|
||||||
return DAG.getTruncStore(Ch, dl, Val, Ptr, N->getSrcValue(),
|
return DAG.getTruncStore(Ch, dl, Val, Ptr, N->getPointerInfo(),
|
||||||
SVOffset, N->getMemoryVT(),
|
N->getMemoryVT(),
|
||||||
isVolatile, isNonTemporal, Alignment);
|
isVolatile, isNonTemporal, Alignment);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1524,7 +1523,6 @@ void DAGTypeLegalizer::ExpandIntRes_LOAD(LoadSDNode *N,
|
|||||||
SDValue Ch = N->getChain();
|
SDValue Ch = N->getChain();
|
||||||
SDValue Ptr = N->getBasePtr();
|
SDValue Ptr = N->getBasePtr();
|
||||||
ISD::LoadExtType ExtType = N->getExtensionType();
|
ISD::LoadExtType ExtType = N->getExtensionType();
|
||||||
int SVOffset = N->getSrcValueOffset();
|
|
||||||
unsigned Alignment = N->getAlignment();
|
unsigned Alignment = N->getAlignment();
|
||||||
bool isVolatile = N->isVolatile();
|
bool isVolatile = N->isVolatile();
|
||||||
bool isNonTemporal = N->isNonTemporal();
|
bool isNonTemporal = N->isNonTemporal();
|
||||||
@ -1535,7 +1533,7 @@ void DAGTypeLegalizer::ExpandIntRes_LOAD(LoadSDNode *N,
|
|||||||
if (N->getMemoryVT().bitsLE(NVT)) {
|
if (N->getMemoryVT().bitsLE(NVT)) {
|
||||||
EVT MemVT = N->getMemoryVT();
|
EVT MemVT = N->getMemoryVT();
|
||||||
|
|
||||||
Lo = DAG.getExtLoad(ExtType, NVT, dl, Ch, Ptr, N->getSrcValue(), SVOffset,
|
Lo = DAG.getExtLoad(ExtType, NVT, dl, Ch, Ptr, N->getPointerInfo(),
|
||||||
MemVT, isVolatile, isNonTemporal, Alignment);
|
MemVT, isVolatile, isNonTemporal, Alignment);
|
||||||
|
|
||||||
// Remember the chain.
|
// Remember the chain.
|
||||||
@ -1557,7 +1555,7 @@ void DAGTypeLegalizer::ExpandIntRes_LOAD(LoadSDNode *N,
|
|||||||
}
|
}
|
||||||
} else if (TLI.isLittleEndian()) {
|
} else if (TLI.isLittleEndian()) {
|
||||||
// Little-endian - low bits are at low addresses.
|
// Little-endian - low bits are at low addresses.
|
||||||
Lo = DAG.getLoad(NVT, dl, Ch, Ptr, N->getSrcValue(), SVOffset,
|
Lo = DAG.getLoad(NVT, dl, Ch, Ptr, N->getPointerInfo(),
|
||||||
isVolatile, isNonTemporal, Alignment);
|
isVolatile, isNonTemporal, Alignment);
|
||||||
|
|
||||||
unsigned ExcessBits =
|
unsigned ExcessBits =
|
||||||
@ -1568,8 +1566,8 @@ void DAGTypeLegalizer::ExpandIntRes_LOAD(LoadSDNode *N,
|
|||||||
unsigned IncrementSize = NVT.getSizeInBits()/8;
|
unsigned IncrementSize = NVT.getSizeInBits()/8;
|
||||||
Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
|
Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
|
||||||
DAG.getIntPtrConstant(IncrementSize));
|
DAG.getIntPtrConstant(IncrementSize));
|
||||||
Hi = DAG.getExtLoad(ExtType, NVT, dl, Ch, Ptr, N->getSrcValue(),
|
Hi = DAG.getExtLoad(ExtType, NVT, dl, Ch, Ptr,
|
||||||
SVOffset+IncrementSize, NEVT,
|
N->getPointerInfo().getWithOffset(IncrementSize), NEVT,
|
||||||
isVolatile, isNonTemporal,
|
isVolatile, isNonTemporal,
|
||||||
MinAlign(Alignment, IncrementSize));
|
MinAlign(Alignment, IncrementSize));
|
||||||
|
|
||||||
@ -1586,7 +1584,7 @@ void DAGTypeLegalizer::ExpandIntRes_LOAD(LoadSDNode *N,
|
|||||||
unsigned ExcessBits = (EBytes - IncrementSize)*8;
|
unsigned ExcessBits = (EBytes - IncrementSize)*8;
|
||||||
|
|
||||||
// Load both the high bits and maybe some of the low bits.
|
// Load both the high bits and maybe some of the low bits.
|
||||||
Hi = DAG.getExtLoad(ExtType, NVT, dl, Ch, Ptr, N->getSrcValue(), SVOffset,
|
Hi = DAG.getExtLoad(ExtType, NVT, dl, Ch, Ptr, N->getPointerInfo(),
|
||||||
EVT::getIntegerVT(*DAG.getContext(),
|
EVT::getIntegerVT(*DAG.getContext(),
|
||||||
MemVT.getSizeInBits() - ExcessBits),
|
MemVT.getSizeInBits() - ExcessBits),
|
||||||
isVolatile, isNonTemporal, Alignment);
|
isVolatile, isNonTemporal, Alignment);
|
||||||
@ -1595,8 +1593,8 @@ void DAGTypeLegalizer::ExpandIntRes_LOAD(LoadSDNode *N,
|
|||||||
Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
|
Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
|
||||||
DAG.getIntPtrConstant(IncrementSize));
|
DAG.getIntPtrConstant(IncrementSize));
|
||||||
// Load the rest of the low bits.
|
// Load the rest of the low bits.
|
||||||
Lo = DAG.getExtLoad(ISD::ZEXTLOAD, NVT, dl, Ch, Ptr, N->getSrcValue(),
|
Lo = DAG.getExtLoad(ISD::ZEXTLOAD, NVT, dl, Ch, Ptr,
|
||||||
SVOffset+IncrementSize,
|
N->getPointerInfo().getWithOffset(IncrementSize),
|
||||||
EVT::getIntegerVT(*DAG.getContext(), ExcessBits),
|
EVT::getIntegerVT(*DAG.getContext(), ExcessBits),
|
||||||
isVolatile, isNonTemporal,
|
isVolatile, isNonTemporal,
|
||||||
MinAlign(Alignment, IncrementSize));
|
MinAlign(Alignment, IncrementSize));
|
||||||
@ -2308,7 +2306,6 @@ SDValue DAGTypeLegalizer::ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo) {
|
|||||||
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
|
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
|
||||||
SDValue Ch = N->getChain();
|
SDValue Ch = N->getChain();
|
||||||
SDValue Ptr = N->getBasePtr();
|
SDValue Ptr = N->getBasePtr();
|
||||||
int SVOffset = N->getSrcValueOffset();
|
|
||||||
unsigned Alignment = N->getAlignment();
|
unsigned Alignment = N->getAlignment();
|
||||||
bool isVolatile = N->isVolatile();
|
bool isVolatile = N->isVolatile();
|
||||||
bool isNonTemporal = N->isNonTemporal();
|
bool isNonTemporal = N->isNonTemporal();
|
||||||
@ -2319,14 +2316,16 @@ SDValue DAGTypeLegalizer::ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo) {
|
|||||||
|
|
||||||
if (N->getMemoryVT().bitsLE(NVT)) {
|
if (N->getMemoryVT().bitsLE(NVT)) {
|
||||||
GetExpandedInteger(N->getValue(), Lo, Hi);
|
GetExpandedInteger(N->getValue(), Lo, Hi);
|
||||||
return DAG.getTruncStore(Ch, dl, Lo, Ptr, N->getSrcValue(), SVOffset,
|
return DAG.getTruncStore(Ch, dl, Lo, Ptr, N->getPointerInfo(),
|
||||||
N->getMemoryVT(), isVolatile, isNonTemporal,
|
N->getMemoryVT(), isVolatile, isNonTemporal,
|
||||||
Alignment);
|
Alignment);
|
||||||
} else if (TLI.isLittleEndian()) {
|
}
|
||||||
|
|
||||||
|
if (TLI.isLittleEndian()) {
|
||||||
// Little-endian - low bits are at low addresses.
|
// Little-endian - low bits are at low addresses.
|
||||||
GetExpandedInteger(N->getValue(), Lo, Hi);
|
GetExpandedInteger(N->getValue(), Lo, Hi);
|
||||||
|
|
||||||
Lo = DAG.getStore(Ch, dl, Lo, Ptr, N->getSrcValue(), SVOffset,
|
Lo = DAG.getStore(Ch, dl, Lo, Ptr, N->getPointerInfo(),
|
||||||
isVolatile, isNonTemporal, Alignment);
|
isVolatile, isNonTemporal, Alignment);
|
||||||
|
|
||||||
unsigned ExcessBits =
|
unsigned ExcessBits =
|
||||||
@ -2337,50 +2336,49 @@ SDValue DAGTypeLegalizer::ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo) {
|
|||||||
unsigned IncrementSize = NVT.getSizeInBits()/8;
|
unsigned IncrementSize = NVT.getSizeInBits()/8;
|
||||||
Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
|
Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
|
||||||
DAG.getIntPtrConstant(IncrementSize));
|
DAG.getIntPtrConstant(IncrementSize));
|
||||||
Hi = DAG.getTruncStore(Ch, dl, Hi, Ptr, N->getSrcValue(),
|
Hi = DAG.getTruncStore(Ch, dl, Hi, Ptr,
|
||||||
SVOffset+IncrementSize, NEVT,
|
N->getPointerInfo().getWithOffset(IncrementSize),
|
||||||
isVolatile, isNonTemporal,
|
NEVT, isVolatile, isNonTemporal,
|
||||||
MinAlign(Alignment, IncrementSize));
|
|
||||||
return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
|
|
||||||
} else {
|
|
||||||
// Big-endian - high bits are at low addresses. Favor aligned stores at
|
|
||||||
// the cost of some bit-fiddling.
|
|
||||||
GetExpandedInteger(N->getValue(), Lo, Hi);
|
|
||||||
|
|
||||||
EVT ExtVT = N->getMemoryVT();
|
|
||||||
unsigned EBytes = ExtVT.getStoreSize();
|
|
||||||
unsigned IncrementSize = NVT.getSizeInBits()/8;
|
|
||||||
unsigned ExcessBits = (EBytes - IncrementSize)*8;
|
|
||||||
EVT HiVT = EVT::getIntegerVT(*DAG.getContext(),
|
|
||||||
ExtVT.getSizeInBits() - ExcessBits);
|
|
||||||
|
|
||||||
if (ExcessBits < NVT.getSizeInBits()) {
|
|
||||||
// Transfer high bits from the top of Lo to the bottom of Hi.
|
|
||||||
Hi = DAG.getNode(ISD::SHL, dl, NVT, Hi,
|
|
||||||
DAG.getConstant(NVT.getSizeInBits() - ExcessBits,
|
|
||||||
TLI.getPointerTy()));
|
|
||||||
Hi = DAG.getNode(ISD::OR, dl, NVT, Hi,
|
|
||||||
DAG.getNode(ISD::SRL, dl, NVT, Lo,
|
|
||||||
DAG.getConstant(ExcessBits,
|
|
||||||
TLI.getPointerTy())));
|
|
||||||
}
|
|
||||||
|
|
||||||
// Store both the high bits and maybe some of the low bits.
|
|
||||||
Hi = DAG.getTruncStore(Ch, dl, Hi, Ptr, N->getSrcValue(),
|
|
||||||
SVOffset, HiVT, isVolatile, isNonTemporal,
|
|
||||||
Alignment);
|
|
||||||
|
|
||||||
// Increment the pointer to the other half.
|
|
||||||
Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
|
|
||||||
DAG.getIntPtrConstant(IncrementSize));
|
|
||||||
// Store the lowest ExcessBits bits in the second half.
|
|
||||||
Lo = DAG.getTruncStore(Ch, dl, Lo, Ptr, N->getSrcValue(),
|
|
||||||
SVOffset+IncrementSize,
|
|
||||||
EVT::getIntegerVT(*DAG.getContext(), ExcessBits),
|
|
||||||
isVolatile, isNonTemporal,
|
|
||||||
MinAlign(Alignment, IncrementSize));
|
MinAlign(Alignment, IncrementSize));
|
||||||
return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
|
return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
// Big-endian - high bits are at low addresses. Favor aligned stores at
|
||||||
|
// the cost of some bit-fiddling.
|
||||||
|
GetExpandedInteger(N->getValue(), Lo, Hi);
|
||||||
|
|
||||||
|
EVT ExtVT = N->getMemoryVT();
|
||||||
|
unsigned EBytes = ExtVT.getStoreSize();
|
||||||
|
unsigned IncrementSize = NVT.getSizeInBits()/8;
|
||||||
|
unsigned ExcessBits = (EBytes - IncrementSize)*8;
|
||||||
|
EVT HiVT = EVT::getIntegerVT(*DAG.getContext(),
|
||||||
|
ExtVT.getSizeInBits() - ExcessBits);
|
||||||
|
|
||||||
|
if (ExcessBits < NVT.getSizeInBits()) {
|
||||||
|
// Transfer high bits from the top of Lo to the bottom of Hi.
|
||||||
|
Hi = DAG.getNode(ISD::SHL, dl, NVT, Hi,
|
||||||
|
DAG.getConstant(NVT.getSizeInBits() - ExcessBits,
|
||||||
|
TLI.getPointerTy()));
|
||||||
|
Hi = DAG.getNode(ISD::OR, dl, NVT, Hi,
|
||||||
|
DAG.getNode(ISD::SRL, dl, NVT, Lo,
|
||||||
|
DAG.getConstant(ExcessBits,
|
||||||
|
TLI.getPointerTy())));
|
||||||
|
}
|
||||||
|
|
||||||
|
// Store both the high bits and maybe some of the low bits.
|
||||||
|
Hi = DAG.getTruncStore(Ch, dl, Hi, Ptr, N->getPointerInfo(),
|
||||||
|
HiVT, isVolatile, isNonTemporal, Alignment);
|
||||||
|
|
||||||
|
// Increment the pointer to the other half.
|
||||||
|
Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
|
||||||
|
DAG.getIntPtrConstant(IncrementSize));
|
||||||
|
// Store the lowest ExcessBits bits in the second half.
|
||||||
|
Lo = DAG.getTruncStore(Ch, dl, Lo, Ptr,
|
||||||
|
N->getPointerInfo().getWithOffset(IncrementSize),
|
||||||
|
EVT::getIntegerVT(*DAG.getContext(), ExcessBits),
|
||||||
|
isVolatile, isNonTemporal,
|
||||||
|
MinAlign(Alignment, IncrementSize));
|
||||||
|
return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo, Hi);
|
||||||
}
|
}
|
||||||
|
|
||||||
SDValue DAGTypeLegalizer::ExpandIntOp_TRUNCATE(SDNode *N) {
|
SDValue DAGTypeLegalizer::ExpandIntOp_TRUNCATE(SDNode *N) {
|
||||||
|
@ -880,10 +880,11 @@ SDValue DAGTypeLegalizer::CreateStackStoreLoad(SDValue Op,
|
|||||||
// the source and destination types.
|
// the source and destination types.
|
||||||
SDValue StackPtr = DAG.CreateStackTemporary(Op.getValueType(), DestVT);
|
SDValue StackPtr = DAG.CreateStackTemporary(Op.getValueType(), DestVT);
|
||||||
// Emit a store to the stack slot.
|
// Emit a store to the stack slot.
|
||||||
SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Op, StackPtr, NULL, 0,
|
SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Op, StackPtr,
|
||||||
false, false, 0);
|
MachinePointerInfo(), false, false, 0);
|
||||||
// Result is a load from the stack slot.
|
// Result is a load from the stack slot.
|
||||||
return DAG.getLoad(DestVT, dl, Store, StackPtr, NULL, 0, false, false, 0);
|
return DAG.getLoad(DestVT, dl, Store, StackPtr, MachinePointerInfo(),
|
||||||
|
false, false, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
/// CustomLowerNode - Replace the node's results with custom code provided
|
/// CustomLowerNode - Replace the node's results with custom code provided
|
||||||
|
@ -119,14 +119,14 @@ void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
|
|||||||
getTypeForEVT(*DAG.getContext()));
|
getTypeForEVT(*DAG.getContext()));
|
||||||
SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment);
|
SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment);
|
||||||
int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
|
int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex();
|
||||||
const Value *SV = PseudoSourceValue::getFixedStack(SPFI);
|
MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(SPFI);
|
||||||
|
|
||||||
// Emit a store to the stack slot.
|
// Emit a store to the stack slot.
|
||||||
SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, SV, 0,
|
SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, InOp, StackPtr, PtrInfo,
|
||||||
false, false, 0);
|
false, false, 0);
|
||||||
|
|
||||||
// Load the first half from the stack slot.
|
// Load the first half from the stack slot.
|
||||||
Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, SV, 0, false, false, 0);
|
Lo = DAG.getLoad(NOutVT, dl, Store, StackPtr, PtrInfo, false, false, 0);
|
||||||
|
|
||||||
// Increment the pointer to the other half.
|
// Increment the pointer to the other half.
|
||||||
unsigned IncrementSize = NOutVT.getSizeInBits() / 8;
|
unsigned IncrementSize = NOutVT.getSizeInBits() / 8;
|
||||||
@ -134,7 +134,8 @@ void DAGTypeLegalizer::ExpandRes_BIT_CONVERT(SDNode *N, SDValue &Lo,
|
|||||||
DAG.getIntPtrConstant(IncrementSize));
|
DAG.getIntPtrConstant(IncrementSize));
|
||||||
|
|
||||||
// Load the second half from the stack slot.
|
// Load the second half from the stack slot.
|
||||||
Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr, SV, IncrementSize, false,
|
Hi = DAG.getLoad(NOutVT, dl, Store, StackPtr,
|
||||||
|
PtrInfo.getWithOffset(IncrementSize), false,
|
||||||
false, MinAlign(Alignment, IncrementSize));
|
false, MinAlign(Alignment, IncrementSize));
|
||||||
|
|
||||||
// Handle endianness of the load.
|
// Handle endianness of the load.
|
||||||
@ -204,22 +205,21 @@ void DAGTypeLegalizer::ExpandRes_NormalLoad(SDNode *N, SDValue &Lo,
|
|||||||
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0));
|
EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0));
|
||||||
SDValue Chain = LD->getChain();
|
SDValue Chain = LD->getChain();
|
||||||
SDValue Ptr = LD->getBasePtr();
|
SDValue Ptr = LD->getBasePtr();
|
||||||
int SVOffset = LD->getSrcValueOffset();
|
|
||||||
unsigned Alignment = LD->getAlignment();
|
unsigned Alignment = LD->getAlignment();
|
||||||
bool isVolatile = LD->isVolatile();
|
bool isVolatile = LD->isVolatile();
|
||||||
bool isNonTemporal = LD->isNonTemporal();
|
bool isNonTemporal = LD->isNonTemporal();
|
||||||
|
|
||||||
assert(NVT.isByteSized() && "Expanded type not byte sized!");
|
assert(NVT.isByteSized() && "Expanded type not byte sized!");
|
||||||
|
|
||||||
Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getSrcValue(), SVOffset,
|
Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(),
|
||||||
isVolatile, isNonTemporal, Alignment);
|
isVolatile, isNonTemporal, Alignment);
|
||||||
|
|
||||||
// Increment the pointer to the other half.
|
// Increment the pointer to the other half.
|
||||||
unsigned IncrementSize = NVT.getSizeInBits() / 8;
|
unsigned IncrementSize = NVT.getSizeInBits() / 8;
|
||||||
Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
|
Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
|
||||||
DAG.getIntPtrConstant(IncrementSize));
|
DAG.getIntPtrConstant(IncrementSize));
|
||||||
Hi = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getSrcValue(),
|
Hi = DAG.getLoad(NVT, dl, Chain, Ptr,
|
||||||
SVOffset+IncrementSize,
|
LD->getPointerInfo().getWithOffset(IncrementSize),
|
||||||
isVolatile, isNonTemporal,
|
isVolatile, isNonTemporal,
|
||||||
MinAlign(Alignment, IncrementSize));
|
MinAlign(Alignment, IncrementSize));
|
||||||
|
|
||||||
|
@ -705,8 +705,8 @@ void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
|
|||||||
EVT VecVT = Vec.getValueType();
|
EVT VecVT = Vec.getValueType();
|
||||||
EVT EltVT = VecVT.getVectorElementType();
|
EVT EltVT = VecVT.getVectorElementType();
|
||||||
SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
|
SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
|
||||||
SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr, NULL, 0,
|
SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
|
||||||
false, false, 0);
|
MachinePointerInfo(), false, false, 0);
|
||||||
|
|
||||||
// Store the new element. This may be larger than the vector element type,
|
// Store the new element. This may be larger than the vector element type,
|
||||||
// so use a truncating store.
|
// so use a truncating store.
|
||||||
@ -714,11 +714,11 @@ void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
|
|||||||
const Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
|
const Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
|
||||||
unsigned Alignment =
|
unsigned Alignment =
|
||||||
TLI.getTargetData()->getPrefTypeAlignment(VecType);
|
TLI.getTargetData()->getPrefTypeAlignment(VecType);
|
||||||
Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, NULL, 0, EltVT,
|
Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT,
|
||||||
false, false, 0);
|
false, false, 0);
|
||||||
|
|
||||||
// Load the Lo part from the stack slot.
|
// Load the Lo part from the stack slot.
|
||||||
Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, NULL, 0,
|
Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
|
||||||
false, false, 0);
|
false, false, 0);
|
||||||
|
|
||||||
// Increment the pointer to the other part.
|
// Increment the pointer to the other part.
|
||||||
@ -727,8 +727,8 @@ void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
|
|||||||
DAG.getIntPtrConstant(IncrementSize));
|
DAG.getIntPtrConstant(IncrementSize));
|
||||||
|
|
||||||
// Load the Hi part from the stack slot.
|
// Load the Hi part from the stack slot.
|
||||||
Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, NULL, 0, false,
|
Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
|
||||||
false, MinAlign(Alignment, IncrementSize));
|
false, false, MinAlign(Alignment, IncrementSize));
|
||||||
}
|
}
|
||||||
|
|
||||||
void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
|
void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
|
||||||
@ -2212,8 +2212,8 @@ static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
|
|||||||
return DAG.getNode(ISD::BIT_CONVERT, dl, VecTy, VecOp);
|
return DAG.getNode(ISD::BIT_CONVERT, dl, VecTy, VecOp);
|
||||||
}
|
}
|
||||||
|
|
||||||
SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16>& LdChain,
|
SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16> &LdChain,
|
||||||
LoadSDNode * LD) {
|
LoadSDNode *LD) {
|
||||||
// The strategy assumes that we can efficiently load powers of two widths.
|
// The strategy assumes that we can efficiently load powers of two widths.
|
||||||
// The routines chops the vector into the largest vector loads with the same
|
// The routines chops the vector into the largest vector loads with the same
|
||||||
// element type or scalar loads and then recombines it to the widen vector
|
// element type or scalar loads and then recombines it to the widen vector
|
||||||
@ -2228,11 +2228,9 @@ SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16>& LdChain,
|
|||||||
// Load information
|
// Load information
|
||||||
SDValue Chain = LD->getChain();
|
SDValue Chain = LD->getChain();
|
||||||
SDValue BasePtr = LD->getBasePtr();
|
SDValue BasePtr = LD->getBasePtr();
|
||||||
int SVOffset = LD->getSrcValueOffset();
|
|
||||||
unsigned Align = LD->getAlignment();
|
unsigned Align = LD->getAlignment();
|
||||||
bool isVolatile = LD->isVolatile();
|
bool isVolatile = LD->isVolatile();
|
||||||
bool isNonTemporal = LD->isNonTemporal();
|
bool isNonTemporal = LD->isNonTemporal();
|
||||||
const Value *SV = LD->getSrcValue();
|
|
||||||
|
|
||||||
int LdWidth = LdVT.getSizeInBits();
|
int LdWidth = LdVT.getSizeInBits();
|
||||||
int WidthDiff = WidenWidth - LdWidth; // Difference
|
int WidthDiff = WidenWidth - LdWidth; // Difference
|
||||||
@ -2241,7 +2239,7 @@ SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16>& LdChain,
|
|||||||
// Find the vector type that can load from.
|
// Find the vector type that can load from.
|
||||||
EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
|
EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
|
||||||
int NewVTWidth = NewVT.getSizeInBits();
|
int NewVTWidth = NewVT.getSizeInBits();
|
||||||
SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, SV, SVOffset,
|
SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
|
||||||
isVolatile, isNonTemporal, Align);
|
isVolatile, isNonTemporal, Align);
|
||||||
LdChain.push_back(LdOp.getValue(1));
|
LdChain.push_back(LdOp.getValue(1));
|
||||||
|
|
||||||
@ -2286,8 +2284,9 @@ SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVector<SDValue, 16>& LdChain,
|
|||||||
NewVTWidth = NewVT.getSizeInBits();
|
NewVTWidth = NewVT.getSizeInBits();
|
||||||
}
|
}
|
||||||
|
|
||||||
SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, SV,
|
SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr,
|
||||||
SVOffset+Offset, isVolatile,
|
LD->getPointerInfo().getWithOffset(Offset),
|
||||||
|
isVolatile,
|
||||||
isNonTemporal, MinAlign(Align, Increment));
|
isNonTemporal, MinAlign(Align, Increment));
|
||||||
LdChain.push_back(LdOp.getValue(1));
|
LdChain.push_back(LdOp.getValue(1));
|
||||||
LdOps.push_back(LdOp);
|
LdOps.push_back(LdOp);
|
||||||
|
@ -3947,16 +3947,6 @@ SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
|
|||||||
return SDValue(N, 0);
|
return SDValue(N, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
|
|
||||||
SDValue Chain, SDValue Ptr,
|
|
||||||
const Value *SV, int SVOffset,
|
|
||||||
bool isVolatile, bool isNonTemporal,
|
|
||||||
unsigned Alignment) {
|
|
||||||
SDValue Undef = getUNDEF(Ptr.getValueType());
|
|
||||||
return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
|
|
||||||
SV, SVOffset, VT, isVolatile, isNonTemporal, Alignment);
|
|
||||||
}
|
|
||||||
|
|
||||||
SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
|
SDValue SelectionDAG::getLoad(EVT VT, DebugLoc dl,
|
||||||
SDValue Chain, SDValue Ptr,
|
SDValue Chain, SDValue Ptr,
|
||||||
MachinePointerInfo PtrInfo,
|
MachinePointerInfo PtrInfo,
|
||||||
|
@ -2950,7 +2950,7 @@ void SelectionDAGBuilder::visitLoad(const LoadInst &I) {
|
|||||||
PtrVT, Ptr,
|
PtrVT, Ptr,
|
||||||
DAG.getConstant(Offsets[i], PtrVT));
|
DAG.getConstant(Offsets[i], PtrVT));
|
||||||
SDValue L = DAG.getLoad(ValueVTs[i], getCurDebugLoc(), Root,
|
SDValue L = DAG.getLoad(ValueVTs[i], getCurDebugLoc(), Root,
|
||||||
A, SV, Offsets[i], isVolatile,
|
A, MachinePointerInfo(SV, Offsets[i]), isVolatile,
|
||||||
isNonTemporal, Alignment);
|
isNonTemporal, Alignment);
|
||||||
|
|
||||||
Values[i] = L;
|
Values[i] = L;
|
||||||
@ -4616,6 +4616,7 @@ void SelectionDAGBuilder::LowerCallTo(ImmutableCallSite CS, SDValue Callee,
|
|||||||
FTy->isVarArg(), Outs, FTy->getContext());
|
FTy->isVarArg(), Outs, FTy->getContext());
|
||||||
|
|
||||||
SDValue DemoteStackSlot;
|
SDValue DemoteStackSlot;
|
||||||
|
int DemoteStackIdx = -100;
|
||||||
|
|
||||||
if (!CanLowerReturn) {
|
if (!CanLowerReturn) {
|
||||||
uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(
|
uint64_t TySize = TLI.getTargetData()->getTypeAllocSize(
|
||||||
@ -4623,10 +4624,10 @@ void SelectionDAGBuilder::LowerCallTo(ImmutableCallSite CS, SDValue Callee,
|
|||||||
unsigned Align = TLI.getTargetData()->getPrefTypeAlignment(
|
unsigned Align = TLI.getTargetData()->getPrefTypeAlignment(
|
||||||
FTy->getReturnType());
|
FTy->getReturnType());
|
||||||
MachineFunction &MF = DAG.getMachineFunction();
|
MachineFunction &MF = DAG.getMachineFunction();
|
||||||
int SSFI = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
|
DemoteStackIdx = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
|
||||||
const Type *StackSlotPtrType = PointerType::getUnqual(FTy->getReturnType());
|
const Type *StackSlotPtrType = PointerType::getUnqual(FTy->getReturnType());
|
||||||
|
|
||||||
DemoteStackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
|
DemoteStackSlot = DAG.getFrameIndex(DemoteStackIdx, TLI.getPointerTy());
|
||||||
Entry.Node = DemoteStackSlot;
|
Entry.Node = DemoteStackSlot;
|
||||||
Entry.Ty = StackSlotPtrType;
|
Entry.Ty = StackSlotPtrType;
|
||||||
Entry.isSExt = false;
|
Entry.isSExt = false;
|
||||||
@ -4720,7 +4721,9 @@ void SelectionDAGBuilder::LowerCallTo(ImmutableCallSite CS, SDValue Callee,
|
|||||||
DemoteStackSlot,
|
DemoteStackSlot,
|
||||||
DAG.getConstant(Offsets[i], PtrVT));
|
DAG.getConstant(Offsets[i], PtrVT));
|
||||||
SDValue L = DAG.getLoad(Outs[i].VT, getCurDebugLoc(), Result.second,
|
SDValue L = DAG.getLoad(Outs[i].VT, getCurDebugLoc(), Result.second,
|
||||||
Add, NULL, Offsets[i], false, false, 1);
|
Add,
|
||||||
|
MachinePointerInfo::getFixedStack(DemoteStackIdx, Offsets[i]),
|
||||||
|
false, false, 1);
|
||||||
Values[i] = L;
|
Values[i] = L;
|
||||||
Chains[i] = L.getValue(1);
|
Chains[i] = L.getValue(1);
|
||||||
}
|
}
|
||||||
@ -4823,7 +4826,7 @@ static SDValue getMemCmpLoad(const Value *PtrVal, MVT LoadVT,
|
|||||||
|
|
||||||
SDValue Ptr = Builder.getValue(PtrVal);
|
SDValue Ptr = Builder.getValue(PtrVal);
|
||||||
SDValue LoadVal = Builder.DAG.getLoad(LoadVT, Builder.getCurDebugLoc(), Root,
|
SDValue LoadVal = Builder.DAG.getLoad(LoadVT, Builder.getCurDebugLoc(), Root,
|
||||||
Ptr, PtrVal /*SrcValue*/, 0/*SVOffset*/,
|
Ptr, MachinePointerInfo(PtrVal),
|
||||||
false /*volatile*/,
|
false /*volatile*/,
|
||||||
false /*nontemporal*/, 1 /* align=1 */);
|
false /*nontemporal*/, 1 /* align=1 */);
|
||||||
|
|
||||||
@ -5457,7 +5460,8 @@ void SelectionDAGBuilder::visitInlineAsm(ImmutableCallSite CS) {
|
|||||||
int SSFI = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
|
int SSFI = MF.getFrameInfo()->CreateStackObject(TySize, Align, false);
|
||||||
SDValue StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
|
SDValue StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy());
|
||||||
Chain = DAG.getStore(Chain, getCurDebugLoc(),
|
Chain = DAG.getStore(Chain, getCurDebugLoc(),
|
||||||
OpInfo.CallOperand, StackSlot, NULL, 0,
|
OpInfo.CallOperand, StackSlot,
|
||||||
|
MachinePointerInfo::getFixedStack(SSFI),
|
||||||
false, false, 0);
|
false, false, 0);
|
||||||
OpInfo.CallOperand = StackSlot;
|
OpInfo.CallOperand = StackSlot;
|
||||||
}
|
}
|
||||||
|
@ -1916,8 +1916,7 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
|
|||||||
DAG.getConstant(bestOffset, PtrType));
|
DAG.getConstant(bestOffset, PtrType));
|
||||||
unsigned NewAlign = MinAlign(Lod->getAlignment(), bestOffset);
|
unsigned NewAlign = MinAlign(Lod->getAlignment(), bestOffset);
|
||||||
SDValue NewLoad = DAG.getLoad(newVT, dl, Lod->getChain(), Ptr,
|
SDValue NewLoad = DAG.getLoad(newVT, dl, Lod->getChain(), Ptr,
|
||||||
Lod->getSrcValue(),
|
Lod->getPointerInfo().getWithOffset(bestOffset),
|
||||||
Lod->getSrcValueOffset() + bestOffset,
|
|
||||||
false, false, NewAlign);
|
false, false, NewAlign);
|
||||||
return DAG.getSetCC(dl, VT,
|
return DAG.getSetCC(dl, VT,
|
||||||
DAG.getNode(ISD::AND, dl, newVT, NewLoad,
|
DAG.getNode(ISD::AND, dl, newVT, NewLoad,
|
||||||
|
Loading…
Reference in New Issue
Block a user