From 0d8fd96903ef54b855331e78065b518f8d0c268f Mon Sep 17 00:00:00 2001 From: Ben Shi Date: Sun, 24 Jan 2021 00:38:57 +0800 Subject: [PATCH] [AVR] Optimize 16-bit comparison with constant Reviewed By: dylanmckay Differential Revision: https://reviews.llvm.org/D93976 --- lib/Target/AVR/AVRISelLowering.cpp | 36 +++++++++++++++++-- lib/Target/AVR/AVRISelLowering.h | 2 ++ test/CodeGen/AVR/cmp.ll | 56 ++++++++++++++++++++++++++++++ 3 files changed, 91 insertions(+), 3 deletions(-) diff --git a/lib/Target/AVR/AVRISelLowering.cpp b/lib/Target/AVR/AVRISelLowering.cpp index bd5fd266d39..d919e08e468 100644 --- a/lib/Target/AVR/AVRISelLowering.cpp +++ b/lib/Target/AVR/AVRISelLowering.cpp @@ -455,6 +455,36 @@ static AVRCC::CondCodes intCCToAVRCC(ISD::CondCode CC) { } } +/// Returns appropriate CP/CPI/CPC nodes code for the given 8/16-bit operands. +SDValue AVRTargetLowering::getAVRCmp(SDValue LHS, SDValue RHS, + SelectionDAG &DAG, SDLoc DL) const { + assert((LHS.getSimpleValueType() == RHS.getSimpleValueType()) && + "LHS and RHS have different types"); + assert(((LHS.getSimpleValueType() == MVT::i16) || + (LHS.getSimpleValueType() == MVT::i8)) && "invalid comparison type"); + + SDValue Cmp; + + if (LHS.getSimpleValueType() == MVT::i16 && dyn_cast(RHS)) { + // Generate a CPI/CPC pair if RHS is a 16-bit constant. + SDValue LHSlo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, LHS, + DAG.getIntPtrConstant(0, DL)); + SDValue LHShi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, LHS, + DAG.getIntPtrConstant(1, DL)); + SDValue RHSlo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, RHS, + DAG.getIntPtrConstant(0, DL)); + SDValue RHShi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, RHS, + DAG.getIntPtrConstant(1, DL)); + Cmp = DAG.getNode(AVRISD::CMP, DL, MVT::Glue, LHSlo, RHSlo); + Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHShi, RHShi, Cmp); + } else { + // Generate ordinary 16-bit comparison. + Cmp = DAG.getNode(AVRISD::CMP, DL, MVT::Glue, LHS, RHS); + } + + return Cmp; +} + /// Returns appropriate AVR CMP/CMPC nodes and corresponding condition code for /// the given operands. SDValue AVRTargetLowering::getAVRCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, @@ -567,7 +597,7 @@ SDValue AVRTargetLowering::getAVRCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, DAG.getIntPtrConstant(1, DL)); Cmp = DAG.getNode(AVRISD::TST, DL, MVT::Glue, Top); } else { - Cmp = DAG.getNode(AVRISD::CMP, DL, MVT::Glue, LHSlo, RHSlo); + Cmp = getAVRCmp(LHSlo, RHSlo, DAG, DL); Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHShi, RHShi, Cmp); } } else if (VT == MVT::i64) { @@ -605,7 +635,7 @@ SDValue AVRTargetLowering::getAVRCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, DAG.getIntPtrConstant(1, DL)); Cmp = DAG.getNode(AVRISD::TST, DL, MVT::Glue, Top); } else { - Cmp = DAG.getNode(AVRISD::CMP, DL, MVT::Glue, LHS0, RHS0); + Cmp = getAVRCmp(LHS0, RHS0, DAG, DL); Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS1, RHS1, Cmp); Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS2, RHS2, Cmp); Cmp = DAG.getNode(AVRISD::CMPC, DL, MVT::Glue, LHS3, RHS3, Cmp); @@ -619,7 +649,7 @@ SDValue AVRTargetLowering::getAVRCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, : DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i8, LHS, DAG.getIntPtrConstant(1, DL))); } else { - Cmp = DAG.getNode(AVRISD::CMP, DL, MVT::Glue, LHS, RHS); + Cmp = getAVRCmp(LHS, RHS, DAG, DL); } } else { llvm_unreachable("Invalid comparison size"); diff --git a/lib/Target/AVR/AVRISelLowering.h b/lib/Target/AVR/AVRISelLowering.h index ed9aea7a329..29d814b6c95 100644 --- a/lib/Target/AVR/AVRISelLowering.h +++ b/lib/Target/AVR/AVRISelLowering.h @@ -138,6 +138,8 @@ public: private: SDValue getAVRCmp(SDValue LHS, SDValue RHS, ISD::CondCode CC, SDValue &AVRcc, SelectionDAG &DAG, SDLoc dl) const; + SDValue getAVRCmp(SDValue LHS, SDValue RHS, SelectionDAG &DAG, + SDLoc dl) const; SDValue LowerShifts(SDValue Op, SelectionDAG &DAG) const; SDValue LowerDivRem(SDValue Op, SelectionDAG &DAG) const; SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; diff --git a/test/CodeGen/AVR/cmp.ll b/test/CodeGen/AVR/cmp.ll index b3224087a68..e9769068f91 100644 --- a/test/CodeGen/AVR/cmp.ll +++ b/test/CodeGen/AVR/cmp.ll @@ -36,6 +36,22 @@ if.end: ret void } +define void @cmpimm16(i16 %a) { +; CHECK-LABEL: cmpimm16: +; CHECK: cpi +; CHECK-NEXT: cpc + %cmp = icmp eq i16 %a, 4567 + br i1 %cmp, label %if.then, label %if.else +if.then: + tail call void @f3(i16 %a) + br label %if.end +if.else: + tail call void @f4(i16 %a) + br label %if.end +if.end: + ret void +} + declare void @f5(i32) declare void @f6(i32) define void @cmp32(i32 %a, i32 %b) { @@ -56,6 +72,24 @@ if.end: ret void } +define void @cmpimm32(i32 %a) { +; CHECK-LABEL: cmpimm32: +; CHECK: cpi +; CHECK-NEXT: cpc +; CHECK-NEXT: cpc +; CHECK-NEXT: cpc + %cmp = icmp eq i32 %a, 6789343 + br i1 %cmp, label %if.then, label %if.else +if.then: + tail call void @f5(i32 %a) + br label %if.end +if.else: + tail call void @f6(i32 %a) + br label %if.end +if.end: + ret void +} + declare void @f7(i64) declare void @f8(i64) define void @cmp64(i64 %a, i64 %b) { @@ -80,6 +114,28 @@ if.end: ret void } +define void @cmpimm64(i64 %a) { +; CHECK-LABEL: cmpimm64: +; CHECK: cpi +; CHECK-NEXT: cpc +; CHECK-NEXT: cpc +; CHECK-NEXT: cpc +; CHECK-NEXT: cpc +; CHECK-NEXT: cpc +; CHECK-NEXT: cpc +; CHECK-NEXT: cpc + %cmp = icmp eq i64 %a, 234566452 + br i1 %cmp, label %if.then, label %if.else +if.then: + tail call void @f7(i64 %a) + br label %if.end +if.else: + tail call void @f8(i64 %a) + br label %if.end +if.end: + ret void +} + declare void @f9() declare void @f10()