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ARM JIT fix for LDRi12 and company.

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llvm-svn: 117478
This commit is contained in:
Jim Grosbach 2010-10-27 19:55:59 +00:00
parent a79201f572
commit 0df1207e99
2 changed files with 18 additions and 4 deletions
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21
lib/Target/ARM/ARMCodeEmitter.cpp
View File

@ -175,7 +175,21 @@ namespace {
unsigned getBitfieldInvertedMaskOpValue(const MachineInstr &MI,
unsigned Op) const { return 0; }
unsigned getAddrModeImm12OpValue(const MachineInstr &MI, unsigned Op)
const { return 0; }
const {
// {17-13} = reg
// {12} = (U)nsigned (add == '1', sub == '0')
// {11-0} = imm12
const MachineOperand &MO = MI.getOperand(Op);
const MachineOperand &MO1 = MI.getOperand(Op + 1);
unsigned Reg = getARMRegisterNumbering(MO.getReg());
int32_t Imm12 = MO1.getImm();
uint32_t Binary;
Binary = Imm12 & 0xfff;
if (Imm12 >= 0)
Binary |= (1 << 12);
Binary |= (Reg << 13);
return Binary;
}
/// getMovi32Value - Return binary encoding of operand for movw/movt. If the
/// machine operand requires relocation, record the relocation and return
@ -946,9 +960,8 @@ void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI,
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
// If this is an LDRi12, LDRrs, or LDRcp, nothing more needs be done.
if (MI.getOpcode() == ARM::LDRi12 || MI.getOpcode() == ARM::LDRrs
|| MI.getOpcode() == ARM::LDRcp) {
// If this is an LDRi12 or LDRcp, nothing more needs be done.
if (MI.getOpcode() == ARM::LDRi12 || MI.getOpcode() == ARM::LDRcp) {
emitWordLE(Binary);
return;
}

1
lib/Target/ARM/ARMInstrInfo.td
View File

@ -397,6 +397,7 @@ def addrmode_imm12 : Operand<i32>,
def ldst_so_reg : Operand<i32>,
ComplexPattern<i32, 3, "SelectLdStSOReg", []> {
// FIXME: Simplify the printer
// FIXME: Add EncoderMethod for this addressing mode
let PrintMethod = "printAddrMode2Operand";
let MIOperandInfo = (ops GPR:$base, GPR:$offsreg, i32imm:$offsimm);
}