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[GISel] Add combine for constant G_PTR_ADD offsets.
https://reviews.llvm.org/D88865 This adds a single combine for GlobalISel to fold: ptradd (inttoptr C1) C2 Into: C1 + C2 Additionally, a small test for AArch64 is added. Patch by pnappa.
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@ -288,6 +288,10 @@ public:
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bool applyCombineAddP2IToPtrAdd(MachineInstr &MI,
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std::pair<Register, bool> &PtrRegAndCommute);
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// Transform G_PTR_ADD (G_PTRTOINT C1), C2 -> C1 + C2
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bool matchCombineConstPtrAddToI2P(MachineInstr &MI, int64_t &NewCst);
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bool applyCombineConstPtrAddToI2P(MachineInstr &MI, int64_t &NewCst);
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/// Transform anyext(trunc(x)) to x.
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bool matchCombineAnyExtTrunc(MachineInstr &MI, Register &Reg);
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bool applyCombineAnyExtTrunc(MachineInstr &MI, Register &Reg);
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@ -339,6 +339,14 @@ def add_p2i_to_ptradd : GICombineRule<
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(apply [{ return Helper.applyCombineAddP2IToPtrAdd(*${root}, ${info}); }])
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>;
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// Fold (ptr_add (int2ptr C1), C2) -> C1 + C2
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def const_ptradd_to_i2p_matchinfo : GIDefMatchData<"int64_t">;
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def const_ptradd_to_i2p: GICombineRule<
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(defs root:$root, const_ptradd_to_i2p_matchinfo:$info),
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(match (wip_match_opcode G_PTR_ADD):$root,
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[{ return Helper.matchCombineConstPtrAddToI2P(*${root}, ${info}); }]),
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(apply [{ return Helper.applyCombineConstPtrAddToI2P(*${root}, ${info}); }])
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>;
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// Simplify: (logic_op (op x...), (op y...)) -> (op (logic_op x, y))
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def hoist_logic_op_with_same_opcode_hands: GICombineRule <
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@ -512,6 +520,8 @@ def identity_combines : GICombineGroup<[select_same_val, right_identity_zero,
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i2p_to_p2i, anyext_trunc_fold,
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fneg_fneg_fold, right_identity_one]>;
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def const_combines : GICombineGroup<[constant_fp_op, const_ptradd_to_i2p]>;
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def known_bits_simplifications : GICombineGroup<[
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and_trivial_mask, redundant_sext_inreg]>;
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@ -532,4 +542,4 @@ def all_combines : GICombineGroup<[trivial_combines, ptr_add_immed_chain,
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not_cmp_fold, opt_brcond_by_inverting_cond,
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unmerge_merge, fabs_fabs_fold, unmerge_cst, unmerge_dead_to_trunc,
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unmerge_zext_to_zext, trunc_ext_fold, trunc_shl,
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constant_fp_op, xor_of_and_with_same_reg, ptr_add_with_zero]>;
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const_combines, xor_of_and_with_same_reg, ptr_add_with_zero]>;
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11
include/llvm/Target/GlobalISel/Combine.td.rej
Normal file
11
include/llvm/Target/GlobalISel/Combine.td.rej
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@ -0,0 +1,11 @@
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***************
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*** 532,535 ****
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not_cmp_fold, opt_brcond_by_inverting_cond,
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unmerge_merge, fabs_fabs_fold, unmerge_cst, unmerge_dead_to_trunc,
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unmerge_zext_to_zext, trunc_ext_fold, trunc_shl,
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- constant_fp_op, xor_of_and_with_same_reg]>;
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--- 542,545 ----
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not_cmp_fold, opt_brcond_by_inverting_cond,
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unmerge_merge, fabs_fabs_fold, unmerge_cst, unmerge_dead_to_trunc,
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unmerge_zext_to_zext, trunc_ext_fold, trunc_shl,
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+ xor_of_and_with_same_reg, const_combines]>;
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@ -1999,6 +1999,35 @@ bool CombinerHelper::applyCombineAddP2IToPtrAdd(
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return true;
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}
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bool CombinerHelper::matchCombineConstPtrAddToI2P(MachineInstr &MI,
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int64_t &NewCst) {
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assert(MI.getOpcode() == TargetOpcode::G_PTR_ADD && "Expected a G_PTR_ADD");
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Register LHS = MI.getOperand(1).getReg();
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Register RHS = MI.getOperand(2).getReg();
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MachineRegisterInfo &MRI = Builder.getMF().getRegInfo();
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if (auto RHSCst = getConstantVRegVal(RHS, MRI)) {
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int64_t Cst;
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if (mi_match(LHS, MRI, m_GIntToPtr(m_ICst(Cst)))) {
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NewCst = Cst + *RHSCst;
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return true;
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}
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}
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return false;
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}
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bool CombinerHelper::applyCombineConstPtrAddToI2P(MachineInstr &MI,
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int64_t &NewCst) {
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assert(MI.getOpcode() == TargetOpcode::G_PTR_ADD && "Expected a G_PTR_ADD");
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Register Dst = MI.getOperand(0).getReg();
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Builder.setInstrAndDebugLoc(MI);
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Builder.buildConstant(Dst, NewCst);
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MI.eraseFromParent();
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return true;
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}
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bool CombinerHelper::matchCombineAnyExtTrunc(MachineInstr &MI, Register &Reg) {
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assert(MI.getOpcode() == TargetOpcode::G_ANYEXT && "Expected a G_ANYEXT");
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Register DstReg = MI.getOperand(0).getReg();
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52
test/CodeGen/AArch64/GlobalISel/combine-ptradd-int2ptr.mir
Normal file
52
test/CodeGen/AArch64/GlobalISel/combine-ptradd-int2ptr.mir
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@ -0,0 +1,52 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
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# RUN: llc -debugify-and-strip-all-safe -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs -mtriple aarch64-unknown-unknown %s -o - | FileCheck %s
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---
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name: agc.test_combine_ptradd_constants_intres
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body: |
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bb.1:
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liveins: $x0
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; CHECK-LABEL: name: agc.test_combine_ptradd_constants_intres
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; CHECK: [[C:%[0-9]+]]:_(p64) = G_CONSTANT i64 44
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; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[C]](p64)
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; CHECK: $x0 = COPY [[PTRTOINT]](s64)
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%1:_(s32) = G_CONSTANT i32 42
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%2:_(s32) = G_CONSTANT i32 2
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%3:_(p64) = G_INTTOPTR %2
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%4:_(p64) = G_PTR_ADD %3, %1
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%5:_(s64) = G_PTRTOINT %4
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$x0 = COPY %5(s64)
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...
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---
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name: agc.test_combine_ptradd_constants_ptrres
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body: |
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bb.1:
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liveins: $x0
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; CHECK-LABEL: name: agc.test_combine_ptradd_constants_ptrres
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; CHECK: [[C:%[0-9]+]]:_(p64) = G_CONSTANT i64 44
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; CHECK: $x0 = COPY [[C]](p64)
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%1:_(s32) = G_CONSTANT i32 42
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%2:_(s32) = G_CONSTANT i32 2
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%3:_(p64) = G_INTTOPTR %2
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%4:_(p64) = G_PTR_ADD %3, %1
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$x0 = COPY %4(p64)
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...
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---
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name: agc.test_not_combine_variable_ptradd
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body: |
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bb.1:
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liveins: $x0, $x1
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; Ensure non-constant G_PTR_ADDs are not folded.
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; CHECK-LABEL: name: agc.test_not_combine_variable_ptradd
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
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; CHECK: [[COPY:%[0-9]+]]:_(p64) = COPY $x1
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; CHECK: [[PTR_ADD:%[0-9]+]]:_(p64) = G_PTR_ADD [[COPY]], [[C]](s32)
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; CHECK: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[PTR_ADD]](p64)
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; CHECK: $x0 = COPY [[PTRTOINT]](s64)
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%1:_(s32) = G_CONSTANT i32 42
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%2:_(p64) = COPY $x1
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%3:_(p64) = G_PTR_ADD %2, %1
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%4:_(s64) = G_PTRTOINT %3
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$x0 = COPY %4(s64)
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...
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