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Spill explicit physical register defs as well.
llvm-svn: 12260
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@ -283,8 +283,8 @@ namespace {
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// the value of the spilled virtual register
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VirtRegMap::MI2VirtMap::const_iterator i, e;
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for (tie(i, e) = vrm_->getFoldedVirts(mii); i != e; ++i) {
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unsigned physReg = vrm_->getPhys(i->second);
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if (physReg) vacateJustPhysReg(mbb, mii, physReg);
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if (vrm_->hasPhys(i->second))
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vacateJustPhysReg(mbb, mii, vrm_->getPhys(i->second));
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}
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// rewrite all used operands
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@ -304,11 +304,19 @@ namespace {
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}
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}
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// spill implicit defs
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// spill implicit physical register defs
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const TargetInstrDescriptor& tid = tii_->get(mii->getOpcode());
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for (const unsigned* id = tid.ImplicitDefs; *id; ++id)
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vacatePhysReg(mbb, mii, *id);
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// spill explicit physical register defs
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for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) {
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MachineOperand& op = mii->getOperand(i);
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if (op.isRegister() && op.getReg() && !op.isUse() &&
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MRegisterInfo::isPhysicalRegister(op.getReg()))
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vacatePhysReg(mbb, mii, op.getReg());
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}
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// rewrite def operands (def&use was handled with the
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// uses so don't check for those here)
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for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) {
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