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[Support] Ensure KnownBits::sextInReg can handle the src == dst sext-in-reg case.

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This was resulting in assertions inside APInt::zext that we were extending to the same bitwidth.
This commit is contained in:
Simon Pilgrim 2021-01-14 14:50:09 +00:00
parent 7d83b7c4c8
commit 0e743a4a45
2 changed files with 6 additions and 2 deletions
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6
lib/Support/KnownBits.cpp
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@ -85,7 +85,11 @@ KnownBits KnownBits::computeForAddSub(bool Add, bool NSW,
KnownBits KnownBits::sextInReg(unsigned SrcBitWidth) const { KnownBits KnownBits::sextInReg(unsigned SrcBitWidth) const {
unsigned BitWidth = getBitWidth(); unsigned BitWidth = getBitWidth();
assert(BitWidth >= SrcBitWidth && "Illegal sext-in-register"); assert(0 < SrcBitWidth && SrcBitWidth <= BitWidth &&
"Illegal sext-in-register");
if (SrcBitWidth == BitWidth)
return *this;
// Sign extension. Compute the demanded bits in the result that are not // Sign extension. Compute the demanded bits in the result that are not
// present in the input. // present in the input.

2
unittests/Support/KnownBitsTest.cpp
View File

@ -427,7 +427,7 @@ TEST(KnownBitsTest, SExtOrTrunc) {
TEST(KnownBitsTest, SExtInReg) { TEST(KnownBitsTest, SExtInReg) {
unsigned Bits = 4; unsigned Bits = 4;
for (unsigned FromBits = 1; FromBits != Bits; ++FromBits) { for (unsigned FromBits = 1; FromBits <= Bits; ++FromBits) {
ForeachKnownBits(Bits, [&](const KnownBits &Known) { ForeachKnownBits(Bits, [&](const KnownBits &Known) {
APInt CommonOne = APInt::getAllOnesValue(Bits); APInt CommonOne = APInt::getAllOnesValue(Bits);
APInt CommonZero = APInt::getAllOnesValue(Bits); APInt CommonZero = APInt::getAllOnesValue(Bits);