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Code Issues Projects Releases Wiki Activity

Fix Clang-tidy readability-redundant-control-flow warnings; other minor fixes.

Browse Source 
Differential revision: http://reviews.llvm.org/D16793

llvm-svn: 259539
This commit is contained in:
Eugene Zelenko 2016-02-02 18:20:45 +00:00
parent ac609ef508
commit 0ebce618ad
17 changed files with 44 additions and 72 deletions
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4
include/llvm/Support/ScaledNumber.h
View File

@ -859,7 +859,6 @@ template <class DigitsT> void ScaledNumber<DigitsT>::shiftLeft(int32_t Shift) {
}
Digits <<= Shift;
return;
}
template <class DigitsT> void ScaledNumber<DigitsT>::shiftRight(int32_t Shift) {
@ -886,7 +885,6 @@ template <class DigitsT> void ScaledNumber<DigitsT>::shiftRight(int32_t Shift) {
}
Digits >>= Shift;
return;
}
template <typename T> struct isPodLike;
@ -896,4 +894,4 @@ template <typename T> struct isPodLike<ScaledNumber<T>> {
} // end namespace llvm
#endif
#endif // LLVM_SUPPORT_SCALEDNUMBER_H

9
include/llvm/Target/TargetInstrInfo.h
View File

@ -45,7 +45,6 @@ class DFAPacketizer;
template<class T> class SmallVectorImpl;
//---------------------------------------------------------------------------
///
/// TargetInstrInfo - Interface to description of machine instruction set
@ -850,8 +849,7 @@ public:
virtual void setSpecialOperandAttr(MachineInstr &OldMI1, MachineInstr &OldMI2,
MachineInstr &NewMI1,
MachineInstr &NewMI2) const {
return;
};
}
/// Return true when a target supports MachineCombiner.
virtual bool useMachineCombiner() const { return false; }
@ -1250,7 +1248,6 @@ public:
/// getExecutionDomain(MI).
virtual void setExecutionDomain(MachineInstr *MI, unsigned Domain) const {}
/// Returns the preferred minimum clearance
/// before an instruction with an unwanted partial register update.
///
@ -1435,6 +1432,6 @@ struct DenseMapInfo<TargetInstrInfo::RegSubRegPair> {
}
};
} // End llvm namespace
} // end namespace llvm
#endif
#endif // LLVM_TARGET_TARGETINSTRINFO_H

16
lib/Analysis/BlockFrequencyInfoImpl.cpp
View File

@ -35,6 +35,7 @@ static char getHexDigit(int N) {
return '0' + N;
return 'a' + N - 10;
}
raw_ostream &BlockMass::print(raw_ostream &OS) const {
for (int Digits = 0; Digits < 16; ++Digits)
OS << getHexDigit(Mass >> (60 - Digits * 4) & 0xf);
@ -78,7 +79,7 @@ struct DitheringDistributer {
BlockMass takeMass(uint32_t Weight);
};
} // end namespace
} // end anonymous namespace
DitheringDistributer::DitheringDistributer(Distribution &Dist,
const BlockMass &Mass) {
@ -130,6 +131,7 @@ static void combineWeight(Weight &W, const Weight &OtherW) {
else
W.Amount += OtherW.Amount;
}
static void combineWeightsBySorting(WeightList &Weights) {
// Sort so edges to the same node are adjacent.
std::sort(Weights.begin(), Weights.end(),
@ -149,8 +151,8 @@ static void combineWeightsBySorting(WeightList &Weights) {
// Erase extra entries.
Weights.erase(O, Weights.end());
return;
}
static void combineWeightsByHashing(WeightList &Weights) {
// Collect weights into a DenseMap.
typedef DenseMap<BlockNode::IndexType, Weight> HashTable;
@ -168,6 +170,7 @@ static void combineWeightsByHashing(WeightList &Weights) {
for (const auto &I : Combined)
Weights.push_back(I.second);
}
static void combineWeights(WeightList &Weights) {
// Use a hash table for many successors to keep this linear.
if (Weights.size() > 128) {
@ -177,6 +180,7 @@ static void combineWeights(WeightList &Weights) {
combineWeightsBySorting(Weights);
}
static uint64_t shiftRightAndRound(uint64_t N, int Shift) {
assert(Shift >= 0);
assert(Shift < 64);
@ -184,6 +188,7 @@ static uint64_t shiftRightAndRound(uint64_t N, int Shift) {
return N;
return (N >> Shift) + (UINT64_C(1) & N >> (Shift - 1));
}
void Distribution::normalize() {
// Early exit for termination nodes.
if (Weights.empty())
@ -523,6 +528,7 @@ BlockFrequencyInfoImplBase::getBlockFreq(const BlockNode &Node) const {
return 0;
return Freqs[Node.Index].Integer;
}
Scaled64
BlockFrequencyInfoImplBase::getFloatingBlockFreq(const BlockNode &Node) const {
if (!Node.isValid())
@ -541,6 +547,7 @@ std::string
BlockFrequencyInfoImplBase::getBlockName(const BlockNode &Node) const {
return std::string();
}
std::string
BlockFrequencyInfoImplBase::getLoopName(const LoopData &Loop) const {
return getBlockName(Loop.getHeader()) + (Loop.isIrreducible() ? "**" : "*");
@ -568,6 +575,7 @@ void IrreducibleGraph::addNodesInLoop(const BFIBase::LoopData &OuterLoop) {
addNode(N);
indexNodes();
}
void IrreducibleGraph::addNodesInFunction() {
Start = 0;
for (uint32_t Index = 0; Index < BFI.Working.size(); ++Index)
@ -575,10 +583,12 @@ void IrreducibleGraph::addNodesInFunction() {
addNode(Index);
indexNodes();
}
void IrreducibleGraph::indexNodes() {
for (auto &I : Nodes)
Lookup[I.Node.Index] = &I;
}
void IrreducibleGraph::addEdge(IrrNode &Irr, const BlockNode &Succ,
const BFIBase::LoopData *OuterLoop) {
if (OuterLoop && OuterLoop->isHeader(Succ))
@ -605,7 +615,7 @@ template <> struct GraphTraits<IrreducibleGraph> {
static ChildIteratorType child_begin(NodeType *N) { return N->succ_begin(); }
static ChildIteratorType child_end(NodeType *N) { return N->succ_end(); }
};
}
} // end namespace llvm
/// \brief Find extra irreducible headers.
///

3
lib/CodeGen/AsmPrinter/DwarfDebug.cpp
View File

@ -54,6 +54,7 @@
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
using namespace llvm;
#define DEBUG_TYPE "dwarfdebug"
@ -297,7 +298,6 @@ static void getObjCClassCategory(StringRef In, StringRef &Class,
Class = In.slice(In.find('[') + 1, In.find('('));
Category = In.slice(In.find('[') + 1, In.find(' '));
return;
}
static StringRef getObjCMethodName(StringRef In) {
@ -530,7 +530,6 @@ void DwarfDebug::finishSubprogramDefinitions() {
});
}
// Collect info for variables that were optimized out.
void DwarfDebug::collectDeadVariables() {
const Module *M = MMI->getModule();

20
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
View File

@ -59,6 +59,7 @@
#include "llvm/Target/TargetSubtargetInfo.h"
#include "llvm/Transforms/Utils/BasicBlockUtils.h"
#include <algorithm>
using namespace llvm;
#define DEBUG_TYPE "isel"
@ -317,7 +318,7 @@ namespace llvm {
"Unknown sched type!");
return createILPListDAGScheduler(IS, OptLevel);
}
}
} // end namespace llvm
// EmitInstrWithCustomInserter - This method should be implemented by targets
// that mark instructions with the 'usesCustomInserter' flag. These
@ -854,7 +855,8 @@ void SelectionDAGISel::CodeGenAndEmitDAG() {
Scheduler->Run(CurDAG, FuncInfo->MBB);
}
if (ViewSUnitDAGs && MatchFilterBB) Scheduler->viewGraph();
if (ViewSUnitDAGs && MatchFilterBB)
Scheduler->viewGraph();
// Emit machine code to BB. This can change 'BB' to the last block being
// inserted into.
@ -1147,7 +1149,7 @@ static void collectFailStats(const Instruction *I) {
case Instruction::LandingPad: NumFastIselFailLandingPad++; return;
}
}
#endif
#endif // NDEBUG
void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) {
// Initialize the Fast-ISel state, if needed.
@ -1454,7 +1456,6 @@ FindSplitPointForStackProtector(MachineBasicBlock *BB, DebugLoc DL) {
void
SelectionDAGISel::FinishBasicBlock() {
DEBUG(dbgs() << "Total amount of phi nodes to update: "
<< FuncInfo->PHINodesToUpdate.size() << "\n";
for (unsigned i = 0, e = FuncInfo->PHINodesToUpdate.size(); i != e; ++i)
@ -1685,7 +1686,6 @@ SelectionDAGISel::FinishBasicBlock() {
SDB->SwitchCases.clear();
}
/// Create the scheduler. If a specific scheduler was specified
/// via the SchedulerRegistry, use it, otherwise select the
/// one preferred by the target.
@ -1996,8 +1996,6 @@ SDNode
return New.getNode();
}
SDNode *SelectionDAGISel::Select_UNDEF(SDNode *N) {
return CurDAG->SelectNodeTo(N, TargetOpcode::IMPLICIT_DEF,N->getValueType(0));
}
@ -2019,7 +2017,6 @@ GetVBR(uint64_t Val, const unsigned char *MatcherTable, unsigned &Idx) {
return Val;
}
/// UpdateChainsAndGlue - When a match is complete, this method updates uses of
/// interior glue and chain results to use the new glue and chain results.
void SelectionDAGISel::
@ -2223,7 +2220,6 @@ WalkChainUsers(const SDNode *ChainedNode,
ChainedNodesInPattern.push_back(User);
InteriorChainedNodes.push_back(User);
}
continue;
}
return Result;
@ -2549,7 +2545,6 @@ static unsigned IsPredicateKnownToFail(const unsigned char *Table,
}
namespace {
struct MatchScope {
/// FailIndex - If this match fails, this is the index to continue with.
unsigned FailIndex;
@ -2606,7 +2601,7 @@ public:
J.setNode(E);
}
};
}
} // end anonymous namespace
SDNode *SelectionDAGISel::
SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
@ -3310,7 +3305,6 @@ SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
InputGlue, GlueResultNodesMatched, true);
return Res;
}
continue;
}
@ -3426,8 +3420,6 @@ SelectCodeCommon(SDNode *NodeToMatch, const unsigned char *MatcherTable,
}
}
void SelectionDAGISel::CannotYetSelect(SDNode *N) {
std::string msg;
raw_string_ostream Msg(msg);

5
lib/CodeGen/TargetInstrInfo.cpp
View File

@ -31,6 +31,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include <cctype>
using namespace llvm;
static cl::opt<bool> DisableHazardRecognizer(
@ -76,8 +77,6 @@ void TargetInstrInfo::insertNoop(MachineBasicBlock &MBB,
/// may be overloaded in the target code to do that.
unsigned TargetInstrInfo::getInlineAsmLength(const char *Str,
const MCAsmInfo &MAI) const {
// Count the number of instructions in the asm.
bool atInsnStart = true;
unsigned Length = 0;
@ -637,7 +636,6 @@ bool TargetInstrInfo::isReassociationCandidate(const MachineInstr &Inst,
bool TargetInstrInfo::getMachineCombinerPatterns(
MachineInstr &Root,
SmallVectorImpl<MachineCombinerPattern> &Patterns) const {
bool Commute;
if (isReassociationCandidate(Root, Commute)) {
// We found a sequence of instructions that may be suitable for a
@ -768,7 +766,6 @@ void TargetInstrInfo::genAlternativeCodeSequence(
assert(Prev && "Unknown pattern for machine combiner");
reassociateOps(Root, *Prev, Pattern, InsInstrs, DelInstrs, InstIdxForVirtReg);
return;
}
/// foldMemoryOperand - Same as the previous version except it allows folding

3
lib/CodeGen/TwoAddressInstructionPass.cpp
View File

@ -50,6 +50,7 @@
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetSubtargetInfo.h"
using namespace llvm;
#define DEBUG_TYPE "twoaddrinstr"
@ -539,7 +540,6 @@ regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {
return TRI->regsOverlap(RegA, RegB);
}
/// Return true if it's potentially profitable to commute the two-address
/// instruction that's being processed.
bool
@ -808,7 +808,6 @@ void TwoAddressInstructionPass::processCopy(MachineInstr *MI) {
}
Processed.insert(MI);
return;
}
/// If there is one more local instruction that reads 'Reg' and it kills 'Reg,

4
lib/IR/GCOV.cpp
View File

@ -22,6 +22,7 @@
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <system_error>
using namespace llvm;
//===----------------------------------------------------------------------===//
@ -496,7 +497,7 @@ public:
OS << format("%5u:", LineNum) << Line << "\n";
}
};
}
} // end anonymous namespace
/// Convert a path to a gcov filename. If PreservePaths is true, this
/// translates "/" to "#", ".." to "^", and drops ".", to match gcov.
@ -683,7 +684,6 @@ void FileInfo::print(raw_ostream &InfoOS, StringRef MainFilename,
if (Options.FuncCoverage)
printFuncCoverage(InfoOS);
printFileCoverage(InfoOS);
return;
}
/// printFunctionSummary - Print function and block summary.

8
lib/IR/Value.cpp
View File

@ -34,6 +34,7 @@
#include "llvm/Support/ManagedStatic.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
using namespace llvm;
//===----------------------------------------------------------------------===//
@ -356,7 +357,7 @@ static bool contains(Value *Expr, Value *V) {
SmallPtrSet<ConstantExpr *, 4> Cache;
return contains(Cache, CE, C);
}
#endif
#endif // NDEBUG
void Value::replaceAllUsesWith(Value *New) {
assert(New && "Value::replaceAllUsesWith(<null>) is invalid!");
@ -408,7 +409,6 @@ void Value::replaceUsesOutsideBlock(Value *New, BasicBlock *BB) {
continue;
U.set(New);
}
return;
}
namespace {
@ -463,7 +463,7 @@ static Value *stripPointerCastsAndOffsets(Value *V) {
return V;
}
} // namespace
} // end anonymous namespace
Value *Value::stripPointerCasts() {
return stripPointerCastsAndOffsets<PSK_ZeroIndicesAndAliases>(this);
@ -642,7 +642,6 @@ void ValueHandleBase::RemoveFromUseList() {
}
}
void ValueHandleBase::ValueIsDeleted(Value *V) {
assert(V->HasValueHandle && "Should only be called if ValueHandles present");
@ -699,7 +698,6 @@ void ValueHandleBase::ValueIsDeleted(Value *V) {
}
}
void ValueHandleBase::ValueIsRAUWd(Value *Old, Value *New) {
assert(Old->HasValueHandle &&"Should only be called if ValueHandles present");
assert(Old != New && "Changing value into itself!");

5
lib/MC/ELFObjectWriter.cpp
View File

@ -35,13 +35,13 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/StringSaver.h"
#include <vector>
using namespace llvm;
#undef DEBUG_TYPE
#define DEBUG_TYPE "reloc-info"
namespace {
typedef DenseMap<const MCSectionELF *, uint32_t> SectionIndexMapTy;
class ELFObjectWriter;
@ -232,7 +232,7 @@ class ELFObjectWriter : public MCObjectWriter {
uint32_t GroupSymbolIndex, uint64_t Offset, uint64_t Size,
const MCSectionELF &Section);
};
}
} // end anonymous namespace
void ELFObjectWriter::align(unsigned Alignment) {
uint64_t Padding = OffsetToAlignment(getStream().tell(), Alignment);
@ -713,7 +713,6 @@ void ELFObjectWriter::recordRelocation(MCAssembler &Asm,
}
ELFRelocationEntry Rec(FixupOffset, SymA, Type, Addend);
Relocations[&FixupSection].push_back(Rec);
return;
}
bool ELFObjectWriter::isInSymtab(const MCAsmLayout &Layout,

1
lib/MC/MCMachOStreamer.cpp
View File

@ -427,7 +427,6 @@ void MCMachOStreamer::EmitZerofill(MCSection *Section, MCSymbol *Symbol,
void MCMachOStreamer::EmitTBSSSymbol(MCSection *Section, MCSymbol *Symbol,
uint64_t Size, unsigned ByteAlignment) {
EmitZerofill(Section, Symbol, Size, ByteAlignment);
return;
}
void MCMachOStreamer::EmitInstToData(const MCInst &Inst,

3
lib/Target/X86/Disassembler/X86DisassemblerDecoder.cpp
View File

@ -53,7 +53,6 @@ struct ContextDecision {
#define debug(s) do { } while (0)
#endif
/*
* contextForAttrs - Client for the instruction context table. Takes a set of
* attributes and returns the appropriate decode context.
@ -276,8 +275,6 @@ static void dbgprintf(struct InternalInstruction* insn,
va_end(ap);
insn->dlog(insn->dlogArg, buffer);
return;
}
/*

3
lib/Target/X86/X86CallFrameOptimization.cpp
View File

@ -110,7 +110,7 @@ private:
};
char X86CallFrameOptimization::ID = 0;
}
} // end anonymous namespace
FunctionPass *llvm::createX86CallFrameOptimization() {
return new X86CallFrameOptimization();
@ -440,7 +440,6 @@ void X86CallFrameOptimization::collectCallInfo(MachineFunction &MF,
return;
Context.UsePush = true;
return;
}
bool X86CallFrameOptimization::adjustCallSequence(MachineFunction &MF,

2
lib/Transforms/InstCombine/InstCombineAddSub.cpp
View File

@ -321,8 +321,6 @@ void FAddendCoef::operator*=(const FAddendCoef &That) {
APFloat::rmNearestTiesToEven);
else
F0.multiply(That.getFpVal(), APFloat::rmNearestTiesToEven);
return;
}
void FAddendCoef::negate() {

1
lib/Transforms/Utils/BuildLibCalls.cpp
View File

@ -226,7 +226,6 @@ static void appendTypeSuffix(Value *Op, StringRef &Name,
Name = NameBuffer;
}
return;
}
Value *llvm::emitUnaryFloatFnCall(Value *Op, StringRef Name, IRBuilder<> &B,

13
tools/bugpoint/Miscompilation.cpp
View File

@ -26,12 +26,13 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/FileUtilities.h"
#include "llvm/Transforms/Utils/Cloning.h"
using namespace llvm;
namespace llvm {
extern cl::opt<std::string> OutputPrefix;
extern cl::list<std::string> InputArgv;
}
} // end namespace llvm
namespace {
static llvm::cl::opt<bool>
@ -52,7 +53,7 @@ namespace {
std::vector<std::string> &Suffix,
std::string &Error) override;
};
}
} // end anonymous namespace
/// TestResult - After passes have been split into a test group and a control
/// group, see if they still break the program.
@ -208,7 +209,7 @@ namespace {
bool TestFuncs(const std::vector<Function*> &Prefix, std::string &Error);
};
}
} // end anonymous namespace
/// Given two modules, link them together and run the program, checking to see
/// if the program matches the diff. If there is an error, return NULL. If not,
@ -469,7 +470,7 @@ namespace {
bool TestFuncs(const std::vector<BasicBlock*> &BBs, std::string &Error);
};
}
} // end anonymous namespace
/// TestFuncs - Extract all blocks for the miscompiled functions except for the
/// specified blocks. If the problem still exists, return true.
@ -712,7 +713,6 @@ static bool TestOptimizer(BugDriver &BD, std::unique_ptr<Module> Test,
return Broken;
}
/// debugMiscompilation - This method is used when the passes selected are not
/// crashing, but the generated output is semantically different from the
/// input.
@ -752,8 +752,6 @@ void BugDriver::debugMiscompilation(std::string *Error) {
outs() << " Portion that is input to optimizer: ";
EmitProgressBitcode(ToOptimize, "tooptimize");
delete ToOptimize; // Delete hacked module.
return;
}
/// Get the specified modules ready for code generator testing.
@ -984,7 +982,6 @@ static bool TestCodeGenerator(BugDriver &BD, std::unique_ptr<Module> Test,
return Result;
}
/// debugCodeGenerator - debug errors in LLC, LLI, or CBE.
///
bool BugDriver::debugCodeGenerator(std::string *Error) {

16
utils/TableGen/AsmMatcherEmitter.cpp
View File

@ -116,6 +116,7 @@
#include <set>
#include <sstream>
#include <forward_list>
using namespace llvm;
#define DEBUG_TYPE "asm-matcher-emitter"
@ -682,7 +683,6 @@ struct OperandMatchEntry {
}
};
class AsmMatcherInfo {
public:
/// Tracked Records
@ -767,7 +767,7 @@ public:
}
};
} // End anonymous namespace
} // end anonymous namespace
void MatchableInfo::dump() const {
errs() << TheDef->getName() << " -- " << "flattened:\"" << AsmString <<"\"\n";
@ -878,7 +878,6 @@ extractSingletonRegisterForAsmOperand(MatchableInfo::AsmOperand &Op,
// If there is no register prefix (i.e. "%" in "%eax"), then this may
// be some random non-register token, just ignore it.
return;
}
void MatchableInfo::initialize(const AsmMatcherInfo &Info,
@ -1156,7 +1155,6 @@ AsmMatcherInfo::getOperandClass(Record *Rec, int SubOpIdx) {
PrintFatalError(Rec->getLoc(), "register class has no class info!");
}
if (Rec->isSubClassOf("RegisterClass")) {
if (ClassInfo *CI = RegisterClassClasses[Rec])
return CI;
@ -1593,7 +1591,7 @@ void AsmMatcherInfo::buildInfo() {
assert(I == J || !J->isSubsetOf(*I));
}
}
#endif
#endif // NDEBUG
}
/// buildInstructionOperandReference - The specified operand is a reference to a
@ -1799,7 +1797,6 @@ static unsigned getConverterOperandID(const std::string &Name,
return ID;
}
static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
std::vector<std::unique_ptr<MatchableInfo>> &Infos,
bool HasMnemonicFirst, raw_ostream &OS) {
@ -2070,7 +2067,6 @@ static void emitConvertFuncs(CodeGenTarget &Target, StringRef ClassName,
OS << " CVT_NUM_SIGNATURES\n";
OS << "};\n\n";
OS << "} // end anonymous namespace\n\n";
// Output the conversion table.
@ -2728,7 +2724,7 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
assert(!(**J < **I));
}
}
#endif
#endif // NDEBUG
DEBUG_WITH_TYPE("instruction_info", {
for (const auto &MI : Info.Matchables)
@ -2809,7 +2805,6 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
emitOperandDiagnosticTypes(Info, OS);
OS << "#endif // GET_OPERAND_DIAGNOSTIC_TYPES\n\n";
OS << "\n#ifdef GET_REGISTER_MATCHER\n";
OS << "#undef GET_REGISTER_MATCHER\n\n";
@ -2857,7 +2852,6 @@ void AsmMatcherEmitter::run(raw_ostream &OS) {
// Emit the available features compute function.
emitComputeAvailableFeatures(Info, OS);
StringToOffsetTable StringTable;
size_t MaxNumOperands = 0;
@ -3183,4 +3177,4 @@ void EmitAsmMatcher(RecordKeeper &RK, raw_ostream &OS) {
AsmMatcherEmitter(RK).run(OS);
}
} // End llvm namespace
} // end namespace llvm