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Implement .rel relocation for R_ARM_ABS32 in MCJIT.

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Patch by Amara Emerson.

llvm-svn: 165128
This commit is contained in:
Tim Northover 2012-10-03 16:29:42 +00:00
parent 7da400088b
commit 0f0719897b
2 changed files with 26 additions and 2 deletions
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12
lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp
View File

@ -264,14 +264,19 @@ void RuntimeDyldELF::resolveARMRelocation(uint8_t *LocalAddress,
default:
llvm_unreachable("Not implemented relocation type!");
// Just write 32bit value to relocation address
// Write a 32bit value to relocation address, taking into account the
// implicit addend encoded in the target.
case ELF::R_ARM_ABS32 :
*TargetPtr = Value;
*TargetPtr += Value;
break;
// Write first 16 bit of 32 bit value to the mov instruction.
// Last 4 bit should be shifted.
case ELF::R_ARM_MOVW_ABS_NC :
// We are not expecting any other addend in the relocation address.
// Using 0x000F0FFF because MOVW has its 16 bit immediate split into 2
// non-contiguous fields.
assert((*TargetPtr & 0x000F0FFF) == 0);
Value = Value & 0xFFFF;
*TargetPtr |= Value & 0xFFF;
*TargetPtr |= ((Value >> 12) & 0xF) << 16;
@ -280,6 +285,9 @@ void RuntimeDyldELF::resolveARMRelocation(uint8_t *LocalAddress,
// Write last 16 bit of 32 bit value to the mov instruction.
// Last 4 bit should be shifted.
case ELF::R_ARM_MOVT_ABS :
// We are not expecting any other addend in the relocation address.
// Use 0x000F0FFF for the same reason as R_ARM_MOVW_ABS_NC.
assert((*TargetPtr & 0x000F0FFF) == 0);
Value = (Value >> 16) & 0xFFFF;
*TargetPtr |= Value & 0xFFF;
*TargetPtr |= ((Value >> 12) & 0xF) << 16;

16
test/ExecutionEngine/MCJIT/test-ptr-reloc.ll Normal file
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@ -0,0 +1,16 @@
; RUN: %lli -mtriple=%mcjit_triple -use-mcjit -O0 %s
@.str = private unnamed_addr constant [6 x i8] c"data1\00", align 1
@ptr = global i8* getelementptr inbounds ([6 x i8]* @.str, i32 0, i32 0), align 4
@.str1 = private unnamed_addr constant [6 x i8] c"data2\00", align 1
@ptr2 = global i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0), align 4
define i32 @main(i32 %argc, i8** nocapture %argv) nounwind readonly {
entry:
%0 = load i8** @ptr, align 4
%1 = load i8** @ptr2, align 4
%cmp = icmp eq i8* %0, %1
%. = zext i1 %cmp to i32
ret i32 %.
}