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Teach frame lowering to ignore debug values after the terminators.
llvm-svn: 123399
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569cd41943
commit
0f2b9d9dc4
@ -300,6 +300,10 @@ public:
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/// it returns end()
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iterator getFirstTerminator();
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/// getLastNonDebugInstr - returns an iterator to the last non-debug
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/// instruction in the basic block, or end()
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iterator getLastNonDebugInstr();
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/// SplitCriticalEdge - Split the critical edge from this block to the
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/// given successor block, and return the newly created block, or null
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/// if splitting is not possible.
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@ -162,6 +162,18 @@ MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() {
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return I;
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}
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MachineBasicBlock::iterator MachineBasicBlock::getLastNonDebugInstr() {
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iterator B = begin(), I = end();
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while (I != B) {
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--I;
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if (I->isDebugValue())
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continue;
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return I;
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}
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// The block is all debug values.
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return end();
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}
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void MachineBasicBlock::dump() const {
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print(dbgs());
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}
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@ -297,7 +297,7 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF) const {
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void ARMFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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assert(MBBI->getDesc().isReturn() &&
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"Can only insert epilog into returning blocks");
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unsigned RetOpcode = MBBI->getOpcode();
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@ -378,7 +378,7 @@ void ARMFrameLowering::emitEpilogue(MachineFunction &MF,
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if (RetOpcode == ARM::TCRETURNdi || RetOpcode == ARM::TCRETURNdiND ||
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RetOpcode == ARM::TCRETURNri || RetOpcode == ARM::TCRETURNriND) {
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// Tail call return: adjust the stack pointer and jump to callee.
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MBBI = prior(MBB.end());
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MBBI = MBB.getLastNonDebugInstr();
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MachineOperand &JumpTarget = MBBI->getOperand(0);
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// Jump to label or value in register.
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@ -189,7 +189,7 @@ static bool isCSRestore(MachineInstr *MI, const unsigned *CSRegs) {
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void Thumb1FrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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assert((MBBI->getOpcode() == ARM::tBX_RET ||
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MBBI->getOpcode() == ARM::tPOP_RET) &&
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"Can only insert epilog into returning blocks");
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@ -104,7 +104,7 @@ void AlphaFrameLowering::emitPrologue(MachineFunction &MF) const {
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void AlphaFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
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assert((MBBI->getOpcode() == Alpha::RETDAG ||
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@ -90,7 +90,7 @@ void BlackfinFrameLowering::emitEpilogue(MachineFunction &MF,
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static_cast<const BlackfinRegisterInfo*>(MF.getTarget().getRegisterInfo());
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const BlackfinInstrInfo &TII =
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*static_cast<const BlackfinInstrInfo*>(MF.getTarget().getInstrInfo());
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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DebugLoc dl = MBBI->getDebugLoc();
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int FrameSize = MFI->getStackSize();
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@ -187,7 +187,7 @@ void SPUFrameLowering::emitPrologue(MachineFunction &MF) const {
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// sufficient number instructions in the basic block. Note that
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// this is just a best guess based on the basic block's size.
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if (MBB.size() >= (unsigned) SPUFrameLowering::branchHintPenalty()) {
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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dl = MBBI->getDebugLoc();
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// Insert terminator label
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@ -199,7 +199,7 @@ void SPUFrameLowering::emitPrologue(MachineFunction &MF) const {
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void SPUFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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const SPUInstrInfo &TII =
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*static_cast<const SPUInstrInfo*>(MF.getTarget().getInstrInfo());
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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@ -386,7 +386,7 @@ void MBlazeFrameLowering::emitPrologue(MachineFunction &MF) const {
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void MBlazeFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MBlazeFunctionInfo *MBlazeFI = MF.getInfo<MBlazeFunctionInfo>();
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const MBlazeInstrInfo &TII =
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@ -110,7 +110,7 @@ void MSP430FrameLowering::emitEpilogue(MachineFunction &MF,
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const MSP430InstrInfo &TII =
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*static_cast<const MSP430InstrInfo*>(MF.getTarget().getInstrInfo());
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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unsigned RetOpcode = MBBI->getOpcode();
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DebugLoc DL = MBBI->getDebugLoc();
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@ -266,7 +266,7 @@ void MipsFrameLowering::emitPrologue(MachineFunction &MF) const {
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void MipsFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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MachineFrameInfo *MFI = MF.getFrameInfo();
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MipsFunctionInfo *MipsFI = MF.getInfo<MipsFunctionInfo>();
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const MipsInstrInfo &TII =
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@ -497,7 +497,8 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF) const {
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void PPCFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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assert(MBBI != MBB.end() && "Returning block has no terminator");
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const PPCInstrInfo &TII =
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*static_cast<const PPCInstrInfo*>(MF.getTarget().getInstrInfo());
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@ -676,29 +677,29 @@ void PPCFrameLowering::emitEpilogue(MachineFunction &MF,
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.addReg(TmpReg);
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}
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} else if (RetOpcode == PPC::TCRETURNdi) {
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MBBI = prior(MBB.end());
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MBBI = MBB.getLastNonDebugInstr();
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MachineOperand &JumpTarget = MBBI->getOperand(0);
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BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILB)).
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addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset());
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} else if (RetOpcode == PPC::TCRETURNri) {
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MBBI = prior(MBB.end());
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MBBI = MBB.getLastNonDebugInstr();
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assert(MBBI->getOperand(0).isReg() && "Expecting register operand.");
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BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILBCTR));
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} else if (RetOpcode == PPC::TCRETURNai) {
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MBBI = prior(MBB.end());
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MBBI = MBB.getLastNonDebugInstr();
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MachineOperand &JumpTarget = MBBI->getOperand(0);
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BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILBA)).addImm(JumpTarget.getImm());
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} else if (RetOpcode == PPC::TCRETURNdi8) {
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MBBI = prior(MBB.end());
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MBBI = MBB.getLastNonDebugInstr();
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MachineOperand &JumpTarget = MBBI->getOperand(0);
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BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILB8)).
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addGlobalAddress(JumpTarget.getGlobal(), JumpTarget.getOffset());
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} else if (RetOpcode == PPC::TCRETURNri8) {
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MBBI = prior(MBB.end());
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MBBI = MBB.getLastNonDebugInstr();
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assert(MBBI->getOperand(0).isReg() && "Expecting register operand.");
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BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILBCTR8));
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} else if (RetOpcode == PPC::TCRETURNai8) {
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MBBI = prior(MBB.end());
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MBBI = MBB.getLastNonDebugInstr();
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MachineOperand &JumpTarget = MBBI->getOperand(0);
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BuildMI(MBB, MBBI, dl, TII.get(PPC::TAILBA8)).addImm(JumpTarget.getImm());
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}
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@ -69,7 +69,7 @@ void SparcFrameLowering::emitPrologue(MachineFunction &MF) const {
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void SparcFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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const SparcInstrInfo &TII =
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*static_cast<const SparcInstrInfo*>(MF.getTarget().getInstrInfo());
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DebugLoc dl = MBBI->getDebugLoc();
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@ -141,7 +141,7 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const {
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void SystemZFrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock &MBB) const {
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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const SystemZInstrInfo &TII =
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*static_cast<const SystemZInstrInfo*>(MF.getTarget().getInstrInfo());
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SystemZMachineFunctionInfo *SystemZMFI =
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@ -646,7 +646,8 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
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X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
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const X86RegisterInfo *RegInfo = TM.getRegisterInfo();
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const X86InstrInfo &TII = *TM.getInstrInfo();
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MachineBasicBlock::iterator MBBI = prior(MBB.end());
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MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
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assert(MBBI != MBB.end() && "Returning block has no instructions");
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unsigned RetOpcode = MBBI->getOpcode();
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DebugLoc DL = MBBI->getDebugLoc();
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bool Is64Bit = STI.is64Bit();
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@ -709,7 +710,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
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MachineBasicBlock::iterator PI = prior(MBBI);
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unsigned Opc = PI->getOpcode();
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if (Opc != X86::POP32r && Opc != X86::POP64r &&
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if (Opc != X86::POP32r && Opc != X86::POP64r && Opc != X86::DBG_VALUE &&
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!PI->getDesc().isTerminator())
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break;
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@ -756,7 +757,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
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// We're returning from function via eh_return.
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if (RetOpcode == X86::EH_RETURN || RetOpcode == X86::EH_RETURN64) {
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MBBI = prior(MBB.end());
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MBBI = MBB.getLastNonDebugInstr();
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MachineOperand &DestAddr = MBBI->getOperand(0);
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assert(DestAddr.isReg() && "Offset should be in register!");
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BuildMI(MBB, MBBI, DL,
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@ -768,7 +769,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
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RetOpcode == X86::TCRETURNmi64) {
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bool isMem = RetOpcode == X86::TCRETURNmi || RetOpcode == X86::TCRETURNmi64;
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// Tail call return: adjust the stack pointer and jump to callee.
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MBBI = prior(MBB.end());
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MBBI = MBB.getFirstTerminator();
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MachineOperand &JumpTarget = MBBI->getOperand(0);
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MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1);
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assert(StackAdjust.isImm() && "Expecting immediate value.");
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@ -826,7 +827,7 @@ void X86FrameLowering::emitEpilogue(MachineFunction &MF,
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(X86FI->getTCReturnAddrDelta() < 0)) {
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// Add the return addr area delta back since we are not tail calling.
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int delta = -1*X86FI->getTCReturnAddrDelta();
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MBBI = prior(MBB.end());
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MBBI = MBB.getLastNonDebugInstr();
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// Check for possible merge with preceeding ADD instruction.
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delta += mergeSPUpdates(MBB, MBBI, StackPtr, true);
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