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[ARM] Single source vmovnt tests. NFC
This commit is contained in:
David Green
parent
2f91cc65b2
commit
0f9807e238
@ -41,6 +41,48 @@ entry:
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ret <8 x i16> %out
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}
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define arm_aapcs_vfpcc <8 x i16> @vmovn32_trunc3(<4 x i32> %src1) {
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; CHECK-LABEL: vmovn32_trunc3:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmov q1, q0
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; CHECK-NEXT: vmov r0, s4
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; CHECK-NEXT: vmov.16 q0[0], r0
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; CHECK-NEXT: vmov.16 q0[1], r0
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; CHECK-NEXT: vmov r0, s5
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; CHECK-NEXT: vmov.16 q0[2], r0
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; CHECK-NEXT: vmov.16 q0[3], r0
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; CHECK-NEXT: vmov r0, s6
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; CHECK-NEXT: vmov.16 q0[4], r0
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; CHECK-NEXT: vmov.16 q0[5], r0
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; CHECK-NEXT: vmov r0, s7
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; CHECK-NEXT: vmov.16 q0[6], r0
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; CHECK-NEXT: vmov.16 q0[7], r0
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; CHECK-NEXT: bx lr
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;
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; CHECKBE-LABEL: vmovn32_trunc3:
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; CHECKBE: @ %bb.0: @ %entry
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; CHECKBE-NEXT: vrev64.32 q2, q0
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; CHECKBE-NEXT: vmov r0, s8
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; CHECKBE-NEXT: vmov.16 q1[0], r0
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; CHECKBE-NEXT: vmov.16 q1[1], r0
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; CHECKBE-NEXT: vmov r0, s9
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; CHECKBE-NEXT: vmov.16 q1[2], r0
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; CHECKBE-NEXT: vmov.16 q1[3], r0
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; CHECKBE-NEXT: vmov r0, s10
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; CHECKBE-NEXT: vmov.16 q1[4], r0
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; CHECKBE-NEXT: vmov.16 q1[5], r0
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; CHECKBE-NEXT: vmov r0, s11
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; CHECKBE-NEXT: vmov.16 q1[6], r0
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; CHECKBE-NEXT: vmov.16 q1[7], r0
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; CHECKBE-NEXT: vrev64.16 q0, q1
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; CHECKBE-NEXT: bx lr
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entry:
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%strided.vec = shufflevector <4 x i32> %src1, <4 x i32> undef, <8 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3>
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%out = trunc <8 x i32> %strided.vec to <8 x i16>
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ret <8 x i16> %out
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}
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define arm_aapcs_vfpcc <16 x i8> @vmovn16_trunc1(<8 x i16> %src1, <8 x i16> %src2) {
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; CHECK-LABEL: vmovn16_trunc1:
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; CHECK: @ %bb.0: @ %entry
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@ -80,6 +122,72 @@ entry:
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ret <16 x i8> %out
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}
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define arm_aapcs_vfpcc <16 x i8> @vmovn16_trunc3(<8 x i16> %src1) {
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; CHECK-LABEL: vmovn16_trunc3:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmov.u16 r0, q0[0]
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; CHECK-NEXT: vmov q1, q0
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; CHECK-NEXT: vmov.8 q0[0], r0
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; CHECK-NEXT: vmov.8 q0[1], r0
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; CHECK-NEXT: vmov.u16 r0, q1[1]
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; CHECK-NEXT: vmov.8 q0[2], r0
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; CHECK-NEXT: vmov.8 q0[3], r0
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; CHECK-NEXT: vmov.u16 r0, q1[2]
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; CHECK-NEXT: vmov.8 q0[4], r0
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; CHECK-NEXT: vmov.8 q0[5], r0
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; CHECK-NEXT: vmov.u16 r0, q1[3]
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; CHECK-NEXT: vmov.8 q0[6], r0
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; CHECK-NEXT: vmov.8 q0[7], r0
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; CHECK-NEXT: vmov.u16 r0, q1[4]
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; CHECK-NEXT: vmov.8 q0[8], r0
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; CHECK-NEXT: vmov.8 q0[9], r0
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; CHECK-NEXT: vmov.u16 r0, q1[5]
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; CHECK-NEXT: vmov.8 q0[10], r0
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; CHECK-NEXT: vmov.8 q0[11], r0
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; CHECK-NEXT: vmov.u16 r0, q1[6]
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; CHECK-NEXT: vmov.8 q0[12], r0
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; CHECK-NEXT: vmov.8 q0[13], r0
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; CHECK-NEXT: vmov.u16 r0, q1[7]
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; CHECK-NEXT: vmov.8 q0[14], r0
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; CHECK-NEXT: vmov.8 q0[15], r0
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; CHECK-NEXT: bx lr
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;
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; CHECKBE-LABEL: vmovn16_trunc3:
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; CHECKBE: @ %bb.0: @ %entry
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; CHECKBE-NEXT: vrev64.16 q2, q0
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; CHECKBE-NEXT: vmov.u16 r0, q2[0]
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; CHECKBE-NEXT: vmov.8 q1[0], r0
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; CHECKBE-NEXT: vmov.8 q1[1], r0
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; CHECKBE-NEXT: vmov.u16 r0, q2[1]
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; CHECKBE-NEXT: vmov.8 q1[2], r0
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; CHECKBE-NEXT: vmov.8 q1[3], r0
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; CHECKBE-NEXT: vmov.u16 r0, q2[2]
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; CHECKBE-NEXT: vmov.8 q1[4], r0
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; CHECKBE-NEXT: vmov.8 q1[5], r0
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; CHECKBE-NEXT: vmov.u16 r0, q2[3]
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; CHECKBE-NEXT: vmov.8 q1[6], r0
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; CHECKBE-NEXT: vmov.8 q1[7], r0
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; CHECKBE-NEXT: vmov.u16 r0, q2[4]
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; CHECKBE-NEXT: vmov.8 q1[8], r0
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; CHECKBE-NEXT: vmov.8 q1[9], r0
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; CHECKBE-NEXT: vmov.u16 r0, q2[5]
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; CHECKBE-NEXT: vmov.8 q1[10], r0
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; CHECKBE-NEXT: vmov.8 q1[11], r0
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; CHECKBE-NEXT: vmov.u16 r0, q2[6]
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; CHECKBE-NEXT: vmov.8 q1[12], r0
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; CHECKBE-NEXT: vmov.8 q1[13], r0
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; CHECKBE-NEXT: vmov.u16 r0, q2[7]
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; CHECKBE-NEXT: vmov.8 q1[14], r0
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; CHECKBE-NEXT: vmov.8 q1[15], r0
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; CHECKBE-NEXT: vrev64.8 q0, q1
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; CHECKBE-NEXT: bx lr
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entry:
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%strided.vec = shufflevector <8 x i16> %src1, <8 x i16> undef, <16 x i32> <i32 0, i32 0, i32 1, i32 1, i32 2, i32 2, i32 3, i32 3, i32 4, i32 4, i32 5, i32 5, i32 6, i32 6, i32 7, i32 7>
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%out = trunc <16 x i16> %strided.vec to <16 x i8>
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ret <16 x i8> %out
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}
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define arm_aapcs_vfpcc <2 x i64> @vmovn64_t1(<2 x i64> %src1, <2 x i64> %src2) {
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; CHECK-LABEL: vmovn64_t1:
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@ -331,6 +439,25 @@ entry:
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ret <4 x i32> %out
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}
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define arm_aapcs_vfpcc <4 x i32> @vmovn32_single_t(<4 x i32> %src1) {
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; CHECK-LABEL: vmovn32_single_t:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmov.f32 s1, s0
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; CHECK-NEXT: vmov.f32 s3, s2
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; CHECK-NEXT: bx lr
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;
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; CHECKBE-LABEL: vmovn32_single_t:
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; CHECKBE: @ %bb.0: @ %entry
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; CHECKBE-NEXT: vrev64.32 q1, q0
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; CHECKBE-NEXT: vmov.f32 s5, s4
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; CHECKBE-NEXT: vmov.f32 s7, s6
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; CHECKBE-NEXT: vrev64.32 q0, q1
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; CHECKBE-NEXT: bx lr
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entry:
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%out = shufflevector <4 x i32> %src1, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
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ret <4 x i32> %out
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}
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@ -474,6 +601,29 @@ entry:
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ret <8 x i16> %out
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}
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define arm_aapcs_vfpcc <8 x i16> @vmovn16_single_t(<8 x i16> %src1) {
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; CHECK-LABEL: vmovn16_single_t:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vins.f16 s0, s0
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; CHECK-NEXT: vins.f16 s1, s1
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; CHECK-NEXT: vins.f16 s2, s2
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; CHECK-NEXT: vins.f16 s3, s3
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; CHECK-NEXT: bx lr
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;
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; CHECKBE-LABEL: vmovn16_single_t:
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; CHECKBE: @ %bb.0: @ %entry
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; CHECKBE-NEXT: vrev64.16 q1, q0
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; CHECKBE-NEXT: vins.f16 s5, s5
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; CHECKBE-NEXT: vins.f16 s4, s4
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; CHECKBE-NEXT: vins.f16 s6, s6
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; CHECKBE-NEXT: vins.f16 s7, s7
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; CHECKBE-NEXT: vrev64.16 q0, q1
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; CHECKBE-NEXT: bx lr
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entry:
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%out = shufflevector <8 x i16> %src1, <8 x i16> undef, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>
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ret <8 x i16> %out
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}
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define arm_aapcs_vfpcc <16 x i8> @vmovn8_b1(<16 x i8> %src1, <16 x i8> %src2) {
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; CHECK-LABEL: vmovn8_b1:
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@ -710,3 +860,67 @@ entry:
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%out = shufflevector <16 x i8> %src1, <16 x i8> %src2, <16 x i32> <i32 16, i32 1, i32 18, i32 3, i32 20, i32 5, i32 22, i32 7, i32 24, i32 9, i32 26, i32 11, i32 28, i32 13, i32 30, i32 15>
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ret <16 x i8> %out
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}
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define arm_aapcs_vfpcc <16 x i8> @vmovn8_single_t(<16 x i8> %src1) {
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; CHECK-LABEL: vmovn8_single_t:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: vmov.u8 r0, q0[0]
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; CHECK-NEXT: vmov q1, q0
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; CHECK-NEXT: vmov.8 q0[0], r0
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; CHECK-NEXT: vmov.8 q0[1], r0
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; CHECK-NEXT: vmov.u8 r0, q1[2]
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; CHECK-NEXT: vmov.8 q0[2], r0
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; CHECK-NEXT: vmov.8 q0[3], r0
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; CHECK-NEXT: vmov.u8 r0, q1[4]
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; CHECK-NEXT: vmov.8 q0[4], r0
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; CHECK-NEXT: vmov.8 q0[5], r0
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; CHECK-NEXT: vmov.u8 r0, q1[6]
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; CHECK-NEXT: vmov.8 q0[6], r0
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; CHECK-NEXT: vmov.8 q0[7], r0
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; CHECK-NEXT: vmov.u8 r0, q1[8]
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; CHECK-NEXT: vmov.8 q0[8], r0
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; CHECK-NEXT: vmov.8 q0[9], r0
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; CHECK-NEXT: vmov.u8 r0, q1[10]
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; CHECK-NEXT: vmov.8 q0[10], r0
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; CHECK-NEXT: vmov.8 q0[11], r0
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; CHECK-NEXT: vmov.u8 r0, q1[12]
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; CHECK-NEXT: vmov.8 q0[12], r0
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; CHECK-NEXT: vmov.8 q0[13], r0
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; CHECK-NEXT: vmov.u8 r0, q1[14]
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; CHECK-NEXT: vmov.8 q0[14], r0
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; CHECK-NEXT: vmov.8 q0[15], r0
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; CHECK-NEXT: bx lr
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;
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; CHECKBE-LABEL: vmovn8_single_t:
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; CHECKBE: @ %bb.0: @ %entry
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; CHECKBE-NEXT: vrev64.8 q2, q0
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; CHECKBE-NEXT: vmov.u8 r0, q2[0]
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; CHECKBE-NEXT: vmov.8 q1[0], r0
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; CHECKBE-NEXT: vmov.8 q1[1], r0
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; CHECKBE-NEXT: vmov.u8 r0, q2[2]
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; CHECKBE-NEXT: vmov.8 q1[2], r0
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; CHECKBE-NEXT: vmov.8 q1[3], r0
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; CHECKBE-NEXT: vmov.u8 r0, q2[4]
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; CHECKBE-NEXT: vmov.8 q1[4], r0
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; CHECKBE-NEXT: vmov.8 q1[5], r0
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; CHECKBE-NEXT: vmov.u8 r0, q2[6]
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; CHECKBE-NEXT: vmov.8 q1[6], r0
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; CHECKBE-NEXT: vmov.8 q1[7], r0
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; CHECKBE-NEXT: vmov.u8 r0, q2[8]
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; CHECKBE-NEXT: vmov.8 q1[8], r0
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; CHECKBE-NEXT: vmov.8 q1[9], r0
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; CHECKBE-NEXT: vmov.u8 r0, q2[10]
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; CHECKBE-NEXT: vmov.8 q1[10], r0
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; CHECKBE-NEXT: vmov.8 q1[11], r0
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; CHECKBE-NEXT: vmov.u8 r0, q2[12]
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; CHECKBE-NEXT: vmov.8 q1[12], r0
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; CHECKBE-NEXT: vmov.8 q1[13], r0
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; CHECKBE-NEXT: vmov.u8 r0, q2[14]
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; CHECKBE-NEXT: vmov.8 q1[14], r0
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; CHECKBE-NEXT: vmov.8 q1[15], r0
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; CHECKBE-NEXT: vrev64.8 q0, q1
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; CHECKBE-NEXT: bx lr
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entry:
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%out = shufflevector <16 x i8> %src1, <16 x i8> undef, <16 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14>
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ret <16 x i8> %out
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}
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