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[AArch64] Add ARMv8.2-A FP16 scalar intrinsics
https://reviews.llvm.org/D41792 llvm-svn: 323005
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@ -146,6 +146,9 @@ let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
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class AdvSIMD_CvtFPToFx_Intrinsic
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: Intrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty, llvm_i32_ty],
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[IntrNoMem]>;
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class AdvSIMD_1Arg_Intrinsic
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: Intrinsic<[llvm_any_ty], [LLVMMatchType<0>], [IntrNoMem]>;
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}
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// Arithmetic ops
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@ -244,7 +247,7 @@ let TargetPrefix = "aarch64", IntrProperties = [IntrNoMem] in {
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// Vector Max
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def int_aarch64_neon_smax : AdvSIMD_2VectorArg_Intrinsic;
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def int_aarch64_neon_umax : AdvSIMD_2VectorArg_Intrinsic;
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def int_aarch64_neon_fmax : AdvSIMD_2VectorArg_Intrinsic;
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def int_aarch64_neon_fmax : AdvSIMD_2FloatArg_Intrinsic;
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def int_aarch64_neon_fmaxnmp : AdvSIMD_2VectorArg_Intrinsic;
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// Vector Max Across Lanes
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@ -256,7 +259,7 @@ let TargetPrefix = "aarch64", IntrProperties = [IntrNoMem] in {
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// Vector Min
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def int_aarch64_neon_smin : AdvSIMD_2VectorArg_Intrinsic;
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def int_aarch64_neon_umin : AdvSIMD_2VectorArg_Intrinsic;
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def int_aarch64_neon_fmin : AdvSIMD_2VectorArg_Intrinsic;
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def int_aarch64_neon_fmin : AdvSIMD_2FloatArg_Intrinsic;
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def int_aarch64_neon_fminnmp : AdvSIMD_2VectorArg_Intrinsic;
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// Vector Min/Max Number
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@ -354,7 +357,7 @@ let TargetPrefix = "aarch64", IntrProperties = [IntrNoMem] in {
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def int_aarch64_neon_sqxtun : AdvSIMD_1VectorArg_Narrow_Intrinsic;
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// Vector Absolute Value
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def int_aarch64_neon_abs : AdvSIMD_1IntArg_Intrinsic;
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def int_aarch64_neon_abs : AdvSIMD_1Arg_Intrinsic;
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// Vector Saturating Absolute Value
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def int_aarch64_neon_sqabs : AdvSIMD_1IntArg_Intrinsic;
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