RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 11:42:57 +01:00
Code Issues Projects Releases Wiki Activity

Add intrinsic for setc instruction on the XCore.

Browse Source 
llvm-svn: 125186
This commit is contained in:
Richard Osborne 2011-02-09 13:22:12 +00:00
parent b162446cda
commit 112cff2533
3 changed files with 28 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
include/llvm/IntrinsicsXCore.td
View File

@ -31,4 +31,6 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.".
[NoCapture<0>]>; [NoCapture<0>]>;
def int_xcore_setd : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], def int_xcore_setd : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],
[NoCapture<0>]>; [NoCapture<0>]>;
def int_xcore_setc : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty],
[NoCapture<0>]>;
} }

13
lib/Target/XCore/XCoreInstrInfo.td
View File

@ -610,8 +610,15 @@ def LDC_lru6 : _FLRU6<
[(set GRRegs:$dst, immU16:$b)]>; [(set GRRegs:$dst, immU16:$b)]>;
} }
def SETC_ru6 : _FRU6<(outs), (ins GRRegs:$r, i32imm:$val),
"setc res[$r], $val",
[(int_xcore_setc GRRegs:$r, immU6:$val)]>;
def SETC_lru6 : _FLRU6<(outs), (ins GRRegs:$r, i32imm:$val),
"setc res[$r], $val",
[(int_xcore_setc GRRegs:$r, immU16:$val)]>;
// Operand register - U6 // Operand register - U6
// TODO setc
let isBranch = 1, isTerminator = 1 in { let isBranch = 1, isTerminator = 1 in {
defm BRFT: FRU6_LRU6_branch<"bt">; defm BRFT: FRU6_LRU6_branch<"bt">;
defm BRBT: FRU6_LRU6_branch<"bt">; defm BRBT: FRU6_LRU6_branch<"bt">;
@ -806,6 +813,10 @@ def CLZ_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
"clz $dst, $src", "clz $dst, $src",
[(set GRRegs:$dst, (ctlz GRRegs:$src))]>; [(set GRRegs:$dst, (ctlz GRRegs:$src))]>;
def SETC_l2r : _FRU6<(outs), (ins GRRegs:$r, GRRegs:$val),
"setc res[$r], $val",
[(int_xcore_setc GRRegs:$r, GRRegs:$val)]>;
// One operand short // One operand short
// TODO edu, eeu, waitet, waitef, tstart, msync, mjoin, syncr, clrtp // TODO edu, eeu, waitet, waitef, tstart, msync, mjoin, syncr, clrtp
// setdp, setcp, setv, setev, kcall // setdp, setcp, setv, setev, kcall

14
test/CodeGen/XCore/resources.ll
View File

@ -95,3 +95,17 @@ define void @setd(i8 addrspace(1)* %r, i32 %value) {
call void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value) call void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value)
ret void ret void
} }
define void @setc(i8 addrspace(1)* %r, i32 %value) {
; CHECK: setc:
; CHECK: setc res[r0], r1
call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value)
ret void
}
define void @setci(i8 addrspace(1)* %r) {
; CHECK: setci:
; CHECK: setc res[r0], 2
call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 2)
ret void
}