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AMDGPU: Make addr64 atomic operand order consistent
vaddr comes before srsrc in every other MUBUF instruction, and is the order it is printed. llvm-svn: 252139
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@ -2391,7 +2391,7 @@ multiclass MUBUF_Atomic <mubuf op, string name, RegisterClass rc,
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defm _ADDR64 : MUBUFAtomicAddr64_m <
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defm _ADDR64 : MUBUFAtomicAddr64_m <
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op, name#"_addr64", (outs),
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op, name#"_addr64", (outs),
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(ins rc:$vdata, SReg_128:$srsrc, VReg_64:$vaddr,
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(ins rc:$vdata, VReg_64:$vaddr, SReg_128:$srsrc,
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SCSrc_32:$soffset, mbuf_offset:$offset, slc:$slc),
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SCSrc_32:$soffset, mbuf_offset:$offset, slc:$slc),
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name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#"$slc", [], 0
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name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#"$slc", [], 0
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>;
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>;
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@ -2410,7 +2410,7 @@ multiclass MUBUF_Atomic <mubuf op, string name, RegisterClass rc,
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defm _RTN_ADDR64 : MUBUFAtomicAddr64_m <
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defm _RTN_ADDR64 : MUBUFAtomicAddr64_m <
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op, name#"_rtn_addr64", (outs rc:$vdata),
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op, name#"_rtn_addr64", (outs rc:$vdata),
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(ins rc:$vdata_in, SReg_128:$srsrc, VReg_64:$vaddr,
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(ins rc:$vdata_in, VReg_64:$vaddr, SReg_128:$srsrc,
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SCSrc_32:$soffset, mbuf_offset:$offset, slc:$slc),
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SCSrc_32:$soffset, mbuf_offset:$offset, slc:$slc),
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name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#" glc"#"$slc",
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name#" $vdata, $vaddr, $srsrc, $soffset addr64"#"$offset"#" glc"#"$slc",
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[(set vt:$vdata,
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[(set vt:$vdata,
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